Modeling of Bilayer Modulated RRAM and Its Array Performance for Compute-in-Memory Applications

Abstract

This paper presents a modified compact model of resistive random-access memory (RRAM) with a tunneling barrier. The bilayer-modulated RRAM can be integrated into a higher-density array, reducing leakage current in standby mode. The model demonstrates current transition behavior from low to high bias regions by considering both bulk-limited and electrodelimited transport mechanisms. This model can evaluate RRAM array performance under various pulsing conditions and device parameter variations with calibrated model cards. The computein-memory application requires precise current sum results hindered by the wire resistance loading effect. This study also evaluates various sizes of arrays suitable for performance improvement.