Modeling Data Movement Performance on Heterogeneous Architectures

Abstract

The cost of data movement on parallel systems varies greatly with machine architecture, job partition, and even nearby jobs. Performance models that accurately capture the cost of data movement provide a tool for analysis, allowing for communication bottlenecks to be pinpointed. Modern heterogeneous architectures yield increased variance in data movement as there are a number of viable paths for inter-GPU communication.In this paper, we present performance models for the various paths of inter-node communication on modern heterogeneous architectures. We model the performance of utilizing all available CPU cores as well as the benefit of copying data to the CPUs when sending many messages. Finally, we present optimizations for a variety of MPI collectives based on the performance expectations provided by these models.