Modeling and simulation of distributed fetch front-end based on M5-edge

Abstract

M5-edge as the only one simulator which is based on widely used open source simulators for EDGE architectures, is not a complete model system. To perfect the simulator, a model of distributed fetch stage has been designed and estimated in this paper. The concrete contents include: the overall framework of fetch, the distributed fetch unit and the router network. A configrable fetch front-end will satisfy the requirements of diversfication. Two primary issues which caused by the distributed structure have been studied with the different amount of fetch units and some significant conclusions have been made: the relationship between distributed instruction cache size and cache miss rate; and the loss by communication latency in the distributed fetch units. Keywords-M5-edge; distributed fetch; cache miss rate; communication latencyI.