Modeling and simulation environment for photonic interconnection networks in high performance computing

Abstract

Computer network architects are concerned with reducing the execution time of applications while maintaining or reducing power consumption of the system. In order to demonstrate the advantages of photonic interconnection networks at the scale of high performance computer clusters and warehouse scale data centers, system level simulations are required. To achieve an appropriate level of accuracy both for device detail and system scale, a simulation suite, rather than a single simulation tool will be most efficient. We present our work on this topic and results for rack scale photonic interconnection networks for high performance computing. Keywords: optical networks, optical interconnects, simulation. INTRODUCTION AND MOTIVATIONSolutions are required to the newsworthy power consumption [3], latency [4] and bandwidth challenges [5] of high performance computing (HPC). Low latency, previously primarily viewed as a requirement for supercomputers, is becoming a more significant metric as the data center size increases to warehouse scale and web search results gather information from more servers [6,7]: beyond a given scale, the parallel efficiency (and thus the general efficiency) is directly related to the latency.Silicon photonics (SiP) [1,2] has the potential to address these challenges and offer improved network functionality. SiP based device capabilities and manufacturability are advancing rapidly in several key areas including: ring resonator temperature stabilization [8], integrated switch fabrics [9,10] and hybrid silicon technology [11]. Integrated silicon (and InP based) photonics reduce power consumption and cost in addition to providing high speed switching capabilities. With off chip bandwidths reaching 100's GB/s [12] high bandwidth photonics is clearly an option to reduce I/O bandwidth bottlenecks. However, proof of concept demonstrations at the device or link level are not sufficient to convince computer architects to incorporate photonics into their next generation system designs. On the other hand, system experiments from computer architects tend to focus on commercially available products, whose price and specifications can easily be obtained [1,2]. Enabling interaction between SiP device designers and computer architects is necessary for realizing novel systems with integrated silicon photonics. Consequently, we must take the extra steps to demonstrate, through modeling and simulations (and, where possible, test-bed validations), the effects of incorporating photonic technology in computer networks. This means, in addition to showing the impact on network metrics such as latency and bandwidth, developing tools that illustrate the execution time improvement of target applications.The optimal way to incorporate SiP into a large scale system depends on the communication requirements of the executed applications. We therefore need modeling and simulation tools to understand the interactions between real time applications and the hardware [24]. More specifically, we need to compare the various...

A synthetic task model for HPC-grade optical network performance evaluation

“…The scheduler and tree generators are implemented in the LWSim simulator [12]. In our implementation, the scheduler is also responsible for simulating the sporadic arrival of jobs.…”

“…The design methodology of a complex HPC interconnect typically consists of iteratively 1) sketching a preliminary design based on the estimated application requirements; 2) optimizing the interconnect parameters while keeping the design physically achievable; 3) evaluating the performance with modeling, simulation, and/or prototypes [12]. Analytical modeling is of limited use due to dynamic behavior such as congestion-aware or adaptive routing.…”

PhoenixSim

“…Request permissions from permissions@acm.org. The emerging possibility of placing photonic components in the core of computing systems is expected to drastically change current architectures [6]. Silicon Photonics links carrying 320 Gbps have been demonstrated [10], and recent predictions indicate that with fully mature components, several Terabit/s could be attained [3].…”