Modeling and formal verification of embedded systems based on a Petri net representation

Abstract

In this paper we concentrate on aspects related to modeling and formal verification of embedded systems. First, we define a formal model of computation for embedded systems based on Petri nets that can capture important features of such systems and allows their representation at different levels of granularity. Our modeling formalism has a welldefined semantics so that it supports a precise representation of the system, the use of formal methods to verify its correctness, and the automation of different tasks along the design process. Second, we propose an approach to the problem of formal verification of embedded systems represented in our modeling formalism. We make use of model checking to prove whether certain properties, expressed as temporal logic formulas, hold with respect to the system model. We introduce a systematic procedure to translate our model into timed automata so that it is possible to use available model checking tools. We propose two strategies for improving the verification efficiency, the first by applying correctness-preserving transformations and the second by exploring the degree of parallelism characteristic to the system. Some examples, including a realistic industrial case, demonstrate the efficiency of our approach on practical applications.

Modeling and analysis of scheduling for distributed real-time embedded systems

“…The abstraction transition tY 2 has four scheduling sequences: ρ1 = t2t3t5t4, ρ2 = t3t2t5t4, ρ3 = t3t4t2t5, and ρ4 = t3t2t4t5. Using the algorithm of [12,13], we know that the execution time of four scheduling sequences is respectively (3,4), (3,5), (3,5), and (3,5). Therefore, So we may set that the scheduling length of the abstraction transition is (3,5).…”

“…After we model the system using formal language, we can find some potential design problems by formal validation and verification, so some design deficiencies can be solved before products are manufactured. Petri nets is a formal language, and has been widely used for modeling in the fields of embedded systems for over the past three decades [3] .…”

A case study on process modelling — Three questions and three techniques

“…These models are directly inspired from flowcharts and are found in many other techniques based on Petri net representation (see [15] for more on modelling systems with Petri nets).…”

Automatic specification of feasible Control Tasks in Benchmark Production Systems

“…In [5], the authors are interested in the CounterExample-Guided Abstraction Refinement (CEGAR) and they present an architecture of the CEGAR-based Reveal automated verification system where Reveal performs checks of safety properties on hardware designs described in the Verilog hardware description language (HDL). In [13,14], a mechanism for hierarchical composition is proposed so that the model of a complex embedded system may be constructed in a structured manner and composed of simpler units easily comprehensible by the designer at each description level. The authors formally define the notion of hierarchy for a Petri net based representation used for modeling embedded systems.…”