Modeling and Design Optimization of a Wideband Passive Equalizer on PCB Based on Near-End Crosstalk and Reflections for High-Speed Serial Data Transmission

Song, Eakhwan; Cho, Jeonghyeon; Kim, Jiseong; Shim, Yujeong; Kim, Gawon; Kim, Joungho

doi:10.1109/temc.2010.2042452

Cited by 13 publications

(3 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The amount of the parasitic resistance and inductance in the equivalent-circuit model of the proposed interposer passive equalizer can be calculated using (1)- (5). w S and w G are the widths of the signal and ground metal lines in the proposed interposer passive equalizer structure, respectively.…”

Section: A Equivalent-circuit Model Of the Proposed Interposer Passimentioning

confidence: 99%

“…This causes intersymbol interference (ISI) to occur in the channel, which then results in a degraded channel bandwidth [4]. The equalization technique that compensates the frequencydependent loss of high-speed channel is one of the practical and effective ways to enable wide channel bandwidth [5], [6]. Among these techniques, an active equalizer is the general and the most conventional solution to solve the ISI problem.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Wideband On-Interposer Passive Equalizer Design for Chip-to-Chip 30-Gb/s Serial Data Transmission

Kim

Cho

Kim

et al. 2015

IEEE Trans. Compon., Packag. Manufact. Technol.

View full text Add to dashboard Cite

In this paper, a novel on-interposer passive equalizer is proposed for chip-to-chip high-speed data transmission on the silicon-based on-interposer channel. The proposed equalizer uses the parasitic resistance and inductance of the on-interposer shunt metal lines to produce the high-pass filter. This filter enables the proposed equalizer to exhibit wideband channel equalization and low power-consumption. Based on the equivalent-circuit model of the proposed on-interposer passive equalizer, the physical dimensions of the equalizer are optimized for 30-Gb/s serial data transmission. The performance of the proposed equalizer with the optimized dimensions was successfully demonstrated by both frequency-and time-domain measurements at data rates of up to 30 Gb/s. In addition, a compact on-interposer passive equalizer was designed for the wide I/O interposer using the same mechanism. The improved quality of serial data transmission in the equalized wide I/O on-interposer channel was successfully verified by simulations at data rates of up to 10 Gb/s. Index Terms-Intersymbol interference (ISI), on-interposer passive equalizer, silicon-interposer, wide I/O, wideband.

show abstract

Section: A Equivalent-circuit Model Of the Proposed Interposer Passimentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Wideband On-Interposer Passive Equalizer Design for Chip-to-Chip 30-Gb/s Serial Data Transmission

Kim

Cho

Kim

et al. 2015

IEEE Trans. Compon., Packag. Manufact. Technol.

View full text Add to dashboard Cite

show abstract

“…The passive equalizers can be realized by inserting an inductive component or a high-impedance line between the signal trace and matched termination [3], such as making use of the parasitic inductance from the PCB to form a LR-type highpass filter [4], using near-end crosstalk and reflection mechanism [5], and so on. The analysis and optimization of passive equalizers have also been discussed in [6].…”

Section: Introductionmentioning

confidence: 99%

A novel dual-functional structure integrating differential-mode equalizer with common-mode filter for Gbps signaling

Cheng

Chuang

2012

International Symposium on Electromagnetic Compatibility - EMC EUROPE

View full text Add to dashboard Cite

In this paper, an innovative passive equalizer that is also able to filter common-mode noise is proposed, which is realized based on a via-conducted coplanar waveguide structure with resistive load (VCPW-R) formed on the ground plane. The proposed structure is low cost, compact and easily designed. Based on the analyses of the odd mode and even mode, a codesign flow is established, with which a set of design parameters are determined for 10 Gbps differential transmission and utilized in test-board fabrication. The effectiveness of the proposed structure is validated by the frequency-domain measurement result and time-domain simulation result of the test board.

show abstract

Differential‐mode Equalizers With Common‐mode Filtering

Chou

2018

Balanced Microwave Filters

View full text Add to dashboard Cite

Modeling and Design Optimization of a Wideband Passive Equalizer on PCB Based on Near-End Crosstalk and Reflections for High-Speed Serial Data Transmission

Cited by 13 publications

References 11 publications

A Wideband On-Interposer Passive Equalizer Design for Chip-to-Chip 30-Gb/s Serial Data Transmission

A Wideband On-Interposer Passive Equalizer Design for Chip-to-Chip 30-Gb/s Serial Data Transmission

A novel dual-functional structure integrating differential-mode equalizer with common-mode filter for Gbps signaling

Differential‐mode Equalizers With Common‐mode Filtering

Contact Info

Product

Resources

About