Modeling and analysis of the growth of copper dendrites in saturated conditions using a multilevel factorial design analysis

Abstract

PurposeTracks, pads and vias on printed circuit boards can suffer from a variety of problems, if the surfaces are contaminated with electrically‐conducting substances. Aims to model a multilevel full‐factorial design to study the effects of temperature, voltage and electrode gap on dendritic growth under saturated conditions, i.e. water droplet contamination.Design/methodology/approachPreparation of several DC‐biased combed‐copper interdigitated capacitors placed in temperature‐controlled water‐filled cuvettes enabled the specific monitoring of dendrite activity. The monitoring used the detection of sharp current increase that accompany a dendritic short circuit condition.FindingsA high R2 polynomial model was produced and it was noted that increased voltages reduce the reliability impact of dendritic growth.Originality/valueThe paper focuses on the reliability impact dendritic growth in saturated conditions.