Modeling and Analysis of On-Chip Power Noise Induced by an On-Chip Linear Voltage Regulator Module With a High-Speed Output Buffer

Kim, Heegon; Cho, Jonghyun; Yoon, Choon Sup; Achkir, Brice; Drewniak, James L.; Fan, Jun

doi:10.1109/temc.2019.2921008

Cited by 5 publications

(2 citation statements)

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“…Fully integrating voltage regulators on-chip becomes a preferable way to reduce the transient response time and output power noise for modern integrated circuits (ICs). 1 At present, three different kinds of voltage regulators: low-dropout (LDO) regulators, 2 buck converters, 3 and switched-capacitor (SC) converters 4 are demonstrated to be feasible to be realized fully on-chip. Although LDO regulators are capable of offering fast transient current to the load, they suffer from a high-power conversion loss when the workload switches to a light-load condition.…”

Section: Introductionmentioning

confidence: 99%

“…Fully integrating voltage regulators on‐chip becomes a preferable way to reduce the transient response time and output power noise for modern integrated circuits (ICs) 1 . At present, three different kinds of voltage regulators: low‐dropout (LDO) regulators, 2 buck converters, 3 and switched‐capacitor (SC) converters 4 are demonstrated to be feasible to be realized fully on‐chip.…”

Section: Introductionmentioning

confidence: 99%

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A low output ripple and high security on‐chip voltage regulation based on Fourier transform

Cheng

Liu

Sun

et al. 2023

Circuit Theory & Apps

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In modern integrated circuits (ICs), integrating workload-agnostic multiphase switched-capacitor (SC) voltage converters on-chip is an effective way to reduce the transient response time, improve the security, and boost the power efficiency. However, a stochastic and unbalanced active sequence within the multiphase SC converter may undermine the corresponding output voltage ripple significantly. In this paper, a novel algorithm that is based on Fourier transform is capable of efficiently mitigating the amplitude of output ripple without compromising its security drastically. To achieve this objective, firstly, the output ripple of a single-phase SC converter needs to be approximated with a Fourier expansion. Then the relationship between the output ripple and active phase sequence of a multiphase SC converter can be modeled precisely under the assistance of Fourier transform. After maximizing the randomness of the active sequences of the multiphase SC converter under different workload conditions and filtering a certain number of phase sequences with unsatisfied output ripples, the optimum control algorithm is generated. As shown in the result, the amplitude of output ripple of a multiphase SC converter can be reduced by 69.5% with negligible security loss and less than 29% power and area overhead under the 55 nm process design kits (PDK).

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Section: Introductionmentioning

confidence: 99%