Model for the substrate hole current based on thermionic hole emission from the anode during Fowler–Nordheim electron tunneling in n-channel metal-oxide-semiconductor field-effect transistors

Abstract

A model is proposed to explain the dependence of the substrate hole current in n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) on applied electric field and on oxide thickness. Two types of devices were prepared: n-channel MOSFETs with gate oxides of 67, 86, and 131 Å and p-channel MOSFETs in which gate oxide thicknesses were almost equal to those in the n-channel MOSFETs. The carrier-separation technique was used in the p-channel MOSFETs, and the average energy of hot electrons entering the silicon substrate was obtained. The average energy of the hot electrons is related to the energy distribution of hot holes created by hot electrons emitted from the oxide into the n+ polysilicon gate during the Fowler–Nordheim electron tunneling in the n-channel MOSFETs. The substrate hole current is numerically modeled as thermionic emission of the hot holes overcoming the energy barrier at the oxide-n+ polysilicon interface. For the gate oxides ranging from 67 to 131 Å, the dependence of the substrate hole current on the electric field and on oxide thickness is explained by using the average energy of the hot electrons and the thermionic hole emission model.

Impact of Tunnel Oxide Thickness on Erratic Erase in Flash Memories

“…We assume that the positive charge responsible for erratic behaviors may origin from an Anode Hole Injection mechanism [7]: during erasing the FN electron current density creates hole/electron pairs at the anode by impact ionization. Part of the holes tunnels back to the floating gate and some of them may be trapped into the oxide.…”

Determination of electron and hole effective masses in thermal oxide utilizing an n-channel silicon MOSFET

“…A report after the above, refuted this process of hole generation and concluded that the generation efficiency of photons with energy above the Si bandgap energy is 10 -4 times smaller than that of the electron-hole pairs by impact ionization [21]. The above studies, leads the author to believe that the hot holes from the anode are back injected into the oxide over the barrier [15,22]. After coming to the oxide valence band, the hole current follows the exp(-B/E) dependence of the FN tunnelling equation (1).…”

“…The resulting hole mass of 0.58m is the same as that obtained for p-4H-SiC MOS device in accumulation undergoing FN tunnelling of holes [2], where the Schottky barrier lowering does not change the tunnelling distance. This implies that Schottky barrier lowering in thin oxides of 5 to 10nm, in which the hot holes are injected into the oxide valence band by thermionic emission over the barrier is absent [15,22]. This is due to the fact that the generated hot holes due to impact ionization at the polysilicon anode of the electrons arriving from the cathode also have a thickness independent energy.…”

“…This is due to the fact that the generated hot holes due to impact ionization at the polysilicon anode of the electrons arriving from the cathode also have a thickness independent energy. This eliminates any Schottky barrier lowering at the valence band which is field-dependent [22] and therefore thickness-dependent.…”

Reliability of erasing operation in NOR-Flash memories

“…Since oxide thickness of todayÕs Flash memories is in the range of 7-10 nm, it is difficult to assume that trapped holes may result as a consequence of impact ionization occurring in the oxide because this phenomenon is more likely to occur in thicker oxides. Therefore anode hole injection [21] has been assumed to be the main cause of hole injection during channel erase [22].…”