Model checking of concurrent system with SDL/sup --/ specification

Blaskovic, B.; Dembitz, S.; Knežević, Predrag

doi:10.1109/melcon.2000.880372

Cited by 2 publications

(4 citation statements)

References 6 publications

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“…Verification of static and dynamic properties of the system in SDT is performed by exhaustive or partial model-checking on the equivalent FSM produced by the combination of control states and data values. For complex SDL specifications, compositional verification and reliance on other formalisms (i.e., LOTOS [16], Spin [17,18], and Petri Nets [19], which are introduced in later sections) have also been suggested. The lack of adequate freeware tool support for validation prompts the research for alternative solutions, that is, translators of SDL to other formal notations.…”

Section: Critical Evaluationmentioning

confidence: 99%

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Formal methods for specification and analysis of communication protocols

Babich

Deotto

2002

IEEE Commun. Surv. Tutorials

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Formal methods (FM) are mathematically-based techniques that provide a rigorous basis for software development: the application of FMs makes it possible to achieve provable correctness and reliability in the various steps of system design and implementation. This article is a tutorial presentation of formal methods and description techniques that address modeling and analysis of distributed systems and concurrent processes in telecommunications and protocol engineering. The aim of the article is to introduce to non-practitioners the main formal methods for communication protocols. For each method, a synthetic description of its textual or graphical syntax is provided. Also, the modeling capabilities and the basic communication features are pointed out by the application of the method to a common case study, a simple retransmission protocol. The tutorial description is completed by examples of recent applications of FMs to the specification and analysis of transmission and signaling protocols in industrial and research projects, which describe the methods' application domain and offer selected references for further readings.

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Section: Critical Evaluationmentioning

confidence: 99%

“…The power of Spin as a verifier, together with its free availability for commercial purposes, justifies its frequent usage in the verification of large SDL models [17,18]. Translating technical documents in SDL diagrams is trivial, thanks to the SDL-based style they adopt.…”

Section: Examples Of Applicationmentioning

confidence: 99%

Formal methods for specification and analysis of communication protocols

Babich

Deotto

2002

IEEE Commun. Surv. Tutorials

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“…Generally, each modeling language can be translated (manually and/or automatically) into any verification language. However, only smaller pairs are in use [26]. The SDL/Promela is one of those pairs [26].…”

Section: Introductionmentioning

confidence: 99%

“…However, only smaller pairs are in use [26]. The SDL/Promela is one of those pairs [26]. Since Promela is the input verification language of SPIN [27], this model checker is chosen in the verification step.…”

Section: Introductionmentioning

confidence: 99%

Practical Model Checking of a Home Area Network System: Case Study

Soufiane

En‐Nouaary

Bah

2019

CIT. J. comput. inf. technol

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The integrated communication infrastructure is the core of the Smart Grid architecture. Its two-way communication and information flow provides this network with all needed resources in order to control and manage all connected components from the utility to the customer side. This latter, named the Home Area Network or HAN, is a dedicated network connecting smart devices inside the customer home, and using different solutions. In order to avoid problems and anomalies along the process life cycle of developing a new solution for HAN network, the modeling and validation is one of the most powerful tools to achieve this goal. This paper presents a practical case study of such validation. It intends to validate a HAN SDL model, described in a previous work, using model checking techniques. It introduces a method to translate the SDL model to a Promela model using an intermediate format IF. After the generation of the Promela model, verification is performed to ensure that some functional properties are satisfied. The desired properties are defined in Linear Temporal Logic (LTL), and DTSPIN (an extension of SPIN with discrete time) model checker is used to verify the correctness of the model.

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Model checking of concurrent system with SDL/sup --/ specification

Cited by 2 publications

References 6 publications

Formal methods for specification and analysis of communication protocols

Formal methods for specification and analysis of communication protocols

Practical Model Checking of a Home Area Network System: Case Study

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