Mix‐mode forward‐biased diode with low clamping voltage for robust ESD applications

Abstract

The forward-biased diode has been widely applied in electrostatic discharge (ESD) protection projects. In this Letter, various diodes with finger-shaped topology are studied by transmission line pulse (TLP) and emission microscope (EMMI) experiments. Among them, a novel mix-mode diode with P-well and floating deep N-well, called MMDIO, is fabricated by the same process and footprint, except that some discrete N + regions are being added to the original anode P + region. This approach forms a combination of a parasitic NPN transistor and a PNPN structure, which can significantly optimise the ESD current efficiency and clamping voltage (V CL). According to the comprehensive comparison, the MMDIO with overlapped anode N + layout could endure the failure current 1.25 times higher than that of a regular diode under the same junction capacitance (C j), while the V CL is reduced by 20%. Accordingly, the MMDIO is an attractive solution to pass the higher ESD level without any negative influence.

Design and optimization of DTSCR for high-speed I/O ESD protection of on-chip ICs

“…Meanwhile, the silicon controlled rectifier (SCR) is also attractive in enhancing the ESD robustness of the diode string, because of the inherent large current discharge ability. For example, Wang et al [7] proposed two kinds of diode-triggered SCR (DTSCR) that can weaken multiple triggering effect and enhance the ESD robustness, but presenting undesired R on and clamping voltage (V C ) [8]. The stacked diodes with embedded SCR proposed by Lin et al was effective to improve the voltage clamping ability rather than the ESD robustness [9].…”