Mitigation measures of the electric field in the medium‐voltage power module: Effect of voltage types and recommendations for designers

Abstract

In the medium‐voltage silicon carbide device power module, the higher voltage level will induce higher electric field stress in critical internal points such as the edge of the conductor on the direct bonded copper (DBC) substrate. This can lead to partial discharge and subsequently accelerated ageing of the insulating medium in the module. Therefore, it is important to reduce the high electric field strength. Herein, the related technical methods of electric field control are reviewed and compared by combining the ease of implementation in real power module and the field control effect. In addition, systematic explanations of the electric field drift and influencing factors of the electric field strength under different voltage types within different module structures are presented. Finally, for half‐bridge power modules with different substrates structures, suggestions on how to implement non‐linear field‐dependent materials to reduce the electric field strength are given.

Superior Surface-Insulated Polymers with Low Leakage Current Enabled by Tailored Coatings Deposited with Colliding Plasma Jets

“…For electric field optimization, coating high-conductivity material at the triple junction is the most commonly used method for power modules . The colliding jet in the single-component mode can deposit TiO 2 .…”

“…For electric field optimization, coating high-conductivity material at the triple junction is the most commonly used method for power modules. 43 The colliding jet in the single-component mode can deposit TiO 2 . 44 The surface resistance tests (Figure 5b) show that the PTFE deposited with this TiO 2 coating has a surface resistance close to 10 −3 S. We replace the PTFE near the triple junction with this TiO 2 coating in the simulation model, and the results show that the along-the-surface electric field is reduced by about 23.7%, and the normal electric field is reduced by about 15.2%.…”

A Comprehensive Review of Mitigation Strategies to Address Insulation Challenges within High Voltage, High Power Density (U)WBG Power Module Packages

“…The triple point (TP) formed at the interface of metal electrodes, substrate, and encapsulation material, the protrusions on metal edges and voids or cavities within the encapsulant, all introduce intolerable electric, thermal, and mechanical stress within the power module, which may cause the breakdown of the insulation. Thus, extensive attention has been devoted to mitigating this electric field stress and bolstering the partial discharge inception voltage (PDIV) of insulation materials within the system [13], [14], [15]. Complicating matters further is the exposure of insulation materials to temperatures surpassing their capacity due to the operational demands of WBG power electronics modules [16], [17].…”

Transient electric field of the combined insulation structure under positive periodic square waveform voltage: Analytical analysis and application

“…In numerical calculation, the transient interfacial charge distribution of double-layer composites [23] and three-layer flat dielectrics [24] under the square waveform voltage with only one single cycle were calculated. Moreover, electric field analysis under this working voltage is also conducted extensively [25,26]. Many scholars approximate the electric field distribution under the PPSW voltage with the static electric field distribution under the electrostatic field [27][28][29][30] or DC field [31].…”