Mitigating single event upset of FPGA for the onboard bus control of satellite

Cui, Xiufang; Liu, Liansheng

doi:10.1016/j.microrel.2020.113779

Cited by 7 publications

(3 citation statements)

References 33 publications

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“…The probability of single-event upset significantly increases in the process of higher strong proton events, mainly caused by high-energy protons with medium to high energy. The main characteristic parameter is the high-energy proton flux of 80-165 MeV [51,52]. Therefore, after obtaining the FY-4A and FY-4B satellite high-energy proton flux FP prediction data products, proton energy spectrum calculations are carried out.…”

Section: Real-time Warning Of Single-event Upset Riskmentioning

confidence: 99%

A Multi-Satellite Space Environment Risk Prediction and Real-Time Warning System for Satellite Safety Management

Kang,

Zhang,

Zong

et al. 2024

Remote Sensing

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In response to the need for a space security situation assessment during orbit, the multi-satellite space environmental risk prediction and early warning system is based on the detection results of the space weather payload of the Fengyun 4A and 4B satellites, as well as the prediction results of the National Space Weather Center, for the first time. By comprehensively utilizing some open-source data, it is the first time that we have achieved a 24 h advanced prediction of the space environment high-energy proton, low-energy particle, and high-energy electron risks for the safety of the Fengyun-series high-orbit satellites, and a real-time warning of satellite single-event upset, surface charging, and deep charging risks. The automation system has preliminarily achieved an intelligent space risk assessment for the safety of multiple stationary meteorological satellites, effectively improving the application efficiency of the space environmental data and the products of Fengyun-series satellites. The business status is stable in operation, and the resulting error between the predicted results of various risk indices and the measured data was less than one level. The warning accuracy was better than 90%. This article uses the system for the first time, to use Fengyun satellite data to, accurately and in a timely manner, predict and warn us about the low-energy particles and surface charging high-risk levels of the Fengyun 4A and 4B satellites during the typical space weather event on 21 April 2023, in response to the impact of complex spatial environmental factors on the safety of Fengyun-series high-orbit satellites. The construction and operation of a multi-satellite space environmental risk prediction and early warning system can provide a reference for the safety work of subsequent satellite ground system operations.

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Section: Real-time Warning Of Single-event Upset Riskmentioning

confidence: 99%

A Multi-Satellite Space Environment Risk Prediction and Real-Time Warning System for Satellite Safety Management

Kang,

Zhang,

Zong

et al. 2024

Remote Sensing

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“…For this reason newer and newer solutions of MV are still developed, both on logical and technological level. New TMR solution, more and more immune to SEU are also created as: Temporal, Partial or Partitioned TMR [17], [18], [19], [20].…”

Section: Configuration Readbackmentioning

confidence: 99%

Optimal Reduction of Number of Test Vectors for Soft Processor Cores Implemented in FPGA

Węgrzyn¹,

Jamro²,

Dąbrowska-Boruch³

et al. 2021

Preprint

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This paper describes a new optimization methodology of testing vector sets reduction for testing of soft-processor cores and their individual blocks. The deterministic test vectors both for whole core and its individual blocks are investigated that significantly reduce the testing time and amount of test data that needs to be stored on the tester memory. The processor executes an assembler program which together with determined testing vectors ex-ercise its functionality. The new BIST methodology applicable at industrial testing of processor cores, diagnostics and dynamic reconfiguration of FPGA is proposed. This novel methodology combined with dynamic reconfiguration of FPGAs can be profitable applied for missions-critical i.e. FPGAs operate in space, or other difficult condition where are explore on radiation. Experimental results demonstrate that the proposed approach reduces many times testing time.

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“…For this reason, newer solutions of MV are still being developed, both at the logical and technological levels. New TMR solutions, increasingly immune to SEUs, are also created as temporal, partial, or partitioned TMR [18][19][20][21].…”

Section: Configuration Readbackmentioning

confidence: 99%

Optimal Reduction in the Number of Test Vectors for Soft Processor Cores Implemented in FPGA

et al. 2021

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Testing FPGA-based soft processor cores requires a completely different methodology in comparison to standard processors. The stuck-at fault model is insufficient, as the logic is implemented by lookup tables (LUTs) in FPGA, and this SRAM-based LUT memory is vulnerable to single-event upset (SEU) mainly caused by cosmic radiations. Consequently, in this paper, we used combined SEU-induced and stuck-at fault models to simulate every possible fault. The test program written in an assembler was based on the bijective property. Furthermore, the fault detection matrix was determined, and this matrix describes the detectability of every fault by every test vector. The major novelty of this paper is the optimal reduction in the number of required test vectors in such a way that fault coverage is not reduced. Furthermore, this paper also studied the optimal selection of test vectors when only 95% maximal fault coverage is acceptable; in such a case, only three test vectors are required. Further, local and global test vector selection is also described.

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Mitigating single event upset of FPGA for the onboard bus control of satellite

Cited by 7 publications

References 33 publications

A Multi-Satellite Space Environment Risk Prediction and Real-Time Warning System for Satellite Safety Management

A Multi-Satellite Space Environment Risk Prediction and Real-Time Warning System for Satellite Safety Management

Optimal Reduction of Number of Test Vectors for Soft Processor Cores Implemented in FPGA

Optimal Reduction in the Number of Test Vectors for Soft Processor Cores Implemented in FPGA

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