Missile signal processing common computer architecture for rapid technology upgrade

Rabinkin, Daniel V.; Rutledge, Edward; Monticciolo, Paul

doi:10.1117/12.547765

Cited by 3 publications

(2 citation statements)

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“…Experiments According to open source data, the processing power of a missile is in the order of a Quad Core PowerPC G4 from the 74xx processor family and ATR algorithms for missiles are implemented in C/C++ [38]. The SPR is developed in MATLAB 2015a and the processing platform for all trials is an AMD Dual Core 2.1 GHz laptop exploiting a single core.…”

Section: Methodsmentioning

confidence: 99%

“…Hence, the overall processing gain of a final missile implementation is x22 up to x1250. That gain increases even more if ordinary processors are According to future upgrades to the US Navy SM-3 missile, proposed by the MIT Lincoln Laboratory [38], the desired missile latency should be 16.7ms which we adopt in our paper. Considering the aforementioned processing gain due to the platform, the coding differences and the desired this latency, we set an upper processing time limit of 500ms for our developing platform.…”

Section: Methodsmentioning

confidence: 99%

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3D automatic target recognition for future LIDAR missiles

Kechagias‐Stamatis

Aouf

Richardson

2016

IEEE Trans. Aerosp. Electron. Syst.

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We present a real-time 3D Automatic Target Recognition approach appropriate for future Light Detection and Ranging (LIDAR) based missiles. Our technique extends the Speeded-Up Robust Features method into the third dimension by solving multiple 2-dimensional problems and performs template matching based on the extreme case of a single pose per target. Evaluation on military targets shows higher recognition rates under various transformations and perturbations at lower processing time compared to state-of-the-art approaches.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%