Misfit Dislocations Study in MOVPE Grown Lattice-Mismatched InGaAs/GaAs Heterostructures by Means of DLTS Technique

Abstract

Two deep traps associated with lattice-mismatch induced defects in n-type In 0.042 Ga 0.958 As/GaAs heterostructures and three deep point traps were observed by means of DLTS method. In order to determine the overlapping DLTS-line peaks parameters precisely, high resolution Laplace DLTS studies werw performed. A simple procedure of distinguishing between point and extended defects in DLTS measurements was used.

Improvement of surface leakage current of 2.6 µm InGaAs photodetectors by using inductive coupled plasma chemical vapor deposition technology

“…In the low reverse bias range, the dark current can be described by four mechanisms: diffusion (I DIFF ), SRH generation (I SRH ), trap assisted tunneling (I TAT ), and surface recombination (I S-R ) [21][22][23] as…”

“…The reduction is about 4 orders of magnitude at the reverse bias of V R = −0.5 V. For the mesastructure detectors, the dark current is the sum of the area dark current I A and the perimeter dark current I P due to the large surface state component. 20,21) As the surface techniques are the only difference between the two devices, we therefore considered the surface leakage variation to be the origin of the dark current difference in the two devices in Fig. 3.…”

“…To further quantitatively identify the surface current contribution for two devices, I-V characteristic of the detectors was modeled and the device simulation was carried out by Silvaco Altas. In the low reverse bias range, the dark current can be described by four mechanisms: diffusion (I DIFF ), SRH generation (I SRH ), trap assisted tunneling (I TAT ), and surface recombination (I S-R ) [21][22][23] as…”

Dislocation in lattice-mismatched InGaAs/GaAs heterostructures as a factor of optoelectronic

“…Recently, we also observed asymmetrically broadened DLTS-lines for the case of MOVPE grown unintentionally doped and low quality In 0,042 Ga 0,958 As/GaAs heterostructure [18]. Apart from the observed three deep-level point defects, the two other traps, represented by significantly broadened DLTS-peaks, were ascribed either to misfit dislocations generated at the interface or threading dislocations existing in the InGaAs active layer.…”