Mining Hardware Assertions With Guidance From Static Analysis

Hertz, Samuel; Sheridan, David; Vasudevan, Shobha

doi:10.1109/tcad.2013.2241176

Cited by 70 publications

(33 citation statements)

References 39 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The mining algorithm used in [9] - [11] to generate assertions is binary decision tree. As detailed in point D of section IV in [11], decision tree algorithms are rule induction data mining algorithms [17] - [19].…”

Section: Binary Decision Tree Miningmentioning

confidence: 99%

“…As detailed in point D of section IV in [11], decision tree algorithms are rule induction data mining algorithms [17] - [19]. These algorithms recursively partition the simulation traces data space by assigning values to feature input variables until the value of the target output variable is consistent within a data subspace.…”

Section: Binary Decision Tree Miningmentioning

confidence: 99%

“…The following simple example for 2-input AND gate is presented to reveal the operation of decision tree algorithm described in [11].…”

Section: Binary Decision Tree Miningmentioning

confidence: 99%

“…Section II shows the related work. Section III explains the binary decision tree mining technique used in [9] - [11] and its limitations in the candidate assertions generated. Section IV investigates the proposed BF-DT search algorithm.…”

Section: Introductionmentioning

confidence: 99%

“…They extended the new methodology for system level assertions in [10]. GoldMine is based on decision tree mining and static analysis, where the generated assertions are validated by a formal verification engine [11]. The binary decision tree data miner is replaced with a coverage guided one in [12] resulting in better performance for coverage and succinctness of generated assertions.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Complete Properties Extraction from Simulation Traces for Assertions Auto-generation

Hanafy¹,

Said

Wahba

2015

2015 IEEE 24th North Atlantic Test Workshop

View full text Add to dashboard Cite

Machine learning techniques based on Data Mining are employed for automatic assertion generation in hardware digital design verification. This paper presents a new mining technique to extract all design properties from simulation traces. The extracted properties cover all possible design assertions either at system level or Register Transfer Logic (RTL) verification depending on the simulated design level. It can afterwards be tuned or filtered to match a certain desired abstraction level. The new technique is based on a Breadth-First Decision Tree (BF-DT) search algorithm. The innovated algorithm maps the input simulation traces to a search tree that covers all possible input combinations, and prunes the redundant paths. The proposed technique is tested against recently innovated mining techniques for some basic digital design functions as a proof of concept for the gained efficiency. The main advantage of the new technique is the possibility to extract all the design properties from the simulation traces achieving hundred-percent coverage in a reasonably efficient time for millions of simulation traces.

show abstract