Minimizing cost of local variables access for DSP-processors

Abstract

Recent work on compilation for DSP-processors deals with optimizing access to local variables of functions. The common way is to use one or more address registers as pointers into the functions stack frame and modify it with post modify addressing modes (which are sometimes the only addressing modes). Additionally to previous work we present an algorithm which assigns frame pointer values over a whole procedure. Our algorithm also deals with basic blocks, which have no accesses to local variables. The algorithm works with a new data structure, the control flow line graph, which is derived from the control flow graph. In our experiments, the algorithm showed improvements to similar algorithms.

Optimal Live Range Merge for Address Register Allocation in Embedded Programs

“…a[i+2] = avg * 3; avg += *p++ << 2; (5) } *p--= avg * 3; (6) if (avg < error) } (7) avg -= a[i+1] -error/2; if (avg < error) (8) else avg -= *p++ -error/2; (9) avg -= a[i+2] -error; else { (10) } p += 1; (11) avg -= *p -error; (12) } (13) } (a) (b) First of all assume, for the rest of this paper, that the array data type is a memory word (a typical characteristic of embedded programs). Moreover, assume that each array reference is atomic (i.e.…”

“…This technique is called Live Range Growth (LRG). Merge operations for similar problems have also been studied in [14,9]. The cost of merging two ranges R and S (cost 1 (R, S)) is the total number of cycles of the update instructions required by the merge.…”

“…We call this algorithm the LRO Algorithm, and show its pseudo-code in Alg. (4) for all but the last vertex vp ∈ DG φ , according to LRO, do (5) let (v p,v q ) be the last edge incident to v p (6) for j ← 1 to m do (7) min ← +∞ (8) for i ← 1 to m do (9) if…”

Address register allocation for arrays in loops of embedded programs

“…The allocation of local variables to the stack-frame, using auto-increment (decrement) mode, has been studied in Refs. [5,15,[22][23][24]28].…”

“…identify the array references in L; partitioning them (3) in P 1 ; …; P K ; (4) for each P j ; 1 # j # K do (5) Compute_Minimum_Costs(P j ); (6) Optimal_AR_Distribution({P 1 ; …; P K }; C); (7) (8) procedure Compute_Minimum_Costs(P j ) (9) fill in C 0j with the cost estimated if no address (10) register is allocated to P j ; (11) C ijˆþ 1; 1 # i # R; (12) for each combination of partitioning the references (13) in P j in live ranges LR 1 ; …; LR i ; 1 # i # R do (14) total_costˆ0; (15) for each LR k ; 1 # k # i; do (16) build DG f for LR k ; (17) if DG f is a tree then (18) costˆLRO_cost(LR k ); (19) else (20) costˆBrute_Force_costðLR k Þ;…”