Minimization of Via Count in Multiple-Metal Inductors: Performance Characterization and Physical Modelling

Murphy, Olive H.; McCarthy, K.G.; Murphy, Patrick J.

doi:10.1109/rfic.2006.1651198

Cited by 1 publication

(1 citation statement)

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“…On the other hand, the vertical connections, denoted by VIA's in Fig. 5, through layers of inductor's metal electrodes and ground are employed to realize vertical connections, the effects of which on the imprecision of the overall inductance is reported limited to 0.15 %, (Murphy et al 2006). These three layers of electrodes for the inductor may induce additional vertical parasitic capacitances, which would not be harmful to the overall design if the capacitances are controlled within allowable limits that still lead to satisfactory bandwidths required by the circuit.…”

Section: Inductance Designmentioning

confidence: 99%

Optimizing an on-chip boost DC–DC converter with an on-chip or on-board inductor

2015

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employ capacitances for voltage-boosting to supply relative high-voltage biases to display. These boost circuits are small in sizes and with high efficiency, but limited output currents, which are inadequate for some of large-sized displays. Towards large output currents, inductive DC-DC boost converters are under intensive development to be fully integrated with IC fabrication technology (Richelli et al. 2004;Callemeyn and Steyaert 2012) for displays. The structure and basic operation principles of the DC-DC converter are illustrated by Fig. 1a, b, where the converter consists of an inductor, a switch and a diode in a T-junction. This study is dedicated first to the design and development of an on-chip DC-DC converter with all the switch, diode and inductor designed and realized on chips. It should be noted that adopting an on-chip inductor is sometimes not sufficient for even larger-sized TV panels to provide large currents. Thus, this study also designs an on-board inductors in the forms of planar coils for providing large currents. This proposed off-chip inductor is integrated into the same circuit board with other drive chips for the displays, while offering large and adequate currents, as opposed to an incapable task using an on-chip coiled inductor.Some studies reported on DC-DC converters with onboard inductors (Hui and Baishan 2005;Ludwig et al. 2003;Li et al. 2009;Sonntag and Duarte 2008;Andersen et al. 2011), but no one specifically contributed to display technologies due to the difficulty of offering large currents by planar inductor coils. For larger-sized displays, the inductors in the DC-DC converter are required to be in the levels of μH in order to drive the converter in the regime of hundreds of MHz and then result in output currents in levels of micro-or mini-Ampere. An on-chip planar inductor for a converter could nonetheless require a very large area for switching in hundreds of MHz due to relative thin metal layers, thus it results in high resistance and not Abstract This study is dedicated to develop an on-chip DC-DC boost converter with on-chip or on-board inductors to provide steady high voltage biases from 2.8 to 5 V to drive the gate drivers for advanced liquid crystal displays. Note that the off-chip inductor as compared to the on-chip one inevitably occupies substantial board area and leads to negative effects of electro-magnetic interference (EMI). This study also intends to find optimal design of the on-chip or on-board inductors for an on-chip DC-DC converter in order to provide required large instantaneous currents, while minimizing negative impacts from the offchip inductance. Parametric studies are conducted to successfully find optimal designs, including optimal switching frequency and duty. The optimization process is further standardized for future commercialization. The optimized DC-DC converters are taped out via the TSMC 0.35 μm CMOS process technology to validate the proposed design. Experiments are carried out for validating the performance of tape-out chips. The results...

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Section: Inductance Designmentioning

confidence: 99%