2017
DOI: 10.1007/978-3-319-64647-3_17
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Mind the Gap: Towards Secure 1st-Order Masking in Software

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Cited by 41 publications
(57 citation statements)
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References 28 publications
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“…It is known that the security guarantee of software countermeasures may become invalid after compilation [11,38,51,58]. In this context, Barthe et al [11] showed that the compilation process could maintain the constant-time property for timing sidechannel leaks, while our work addresses potential leaks through power side channels.…”
Section: Related Workmentioning
confidence: 81%
“…It is known that the security guarantee of software countermeasures may become invalid after compilation [11,38,51,58]. In this context, Barthe et al [11] showed that the compilation process could maintain the constant-time property for timing sidechannel leaks, while our work addresses potential leaks through power side channels.…”
Section: Related Workmentioning
confidence: 81%
“…It has also been noted that the reuse of randomness leads to dangerous transition leakage [WM18b]. On the other hand, transition leakages have also been shown to be a problem in the more conventional randomness-expensive masked implementations [PV17], which means our implementation is not necessarily the only one vulnerable to this. Moreover, even if we double our latency to account for reset cycles against transition leakage, our performance is very competitive with previous works.…”
Section: Comparison With Previous Workmentioning
confidence: 97%
“…While our scheme is an extreme example of how theoretical security may be insufficient in practice, similar conclusions can be made for previous works that target security in the t-probing model, even those in which randomness is used as described in [ISW03] and never reused. Effects such as transition leakages have been especially well studied for software by Balash et al [BGG + 14] and more recently by Papagiannopoulos et al [PV17] among others. The resetting and clearing of registers is a popular solution proposed both in [WM18b] and [PV17], but incurs a very high penalty on the latency.…”
Section: Beyond the T-probing Modelmentioning
confidence: 99%
“…It relies on the trace leakage detection tests as well to find vulnerabilities related to a specific AVR microcontroller architecture. Once leakage traces are available, leakage detection using the Welsh t-test is often used to analyse the side channel resistance of protected implementations [23,7,1,18]. These leakage detection tests aim to detect the influence of secret variables on measured side channel traces using statistical hypothesis [14].…”
Section: Related Workmentioning
confidence: 99%
“…The effectiveness of added countermeasures can be validated experimentally [23,7,1,18,14]. However, this approach requires specific equipment for acquiring side channel traces, which can be time consuming and error prone.…”
Section: Introductionmentioning
confidence: 99%