Millimeter-Waves building block design methodology in BiCMOS technology

Abstract

Focusing on circuit routing which is a very critical design step in mm-Waves range, this work proposes a systematic modeling of layout parasitic elements thus fitting measurement and simulation results. Scalable models of extra-device routing elements based on 3D EM software simulations are developed. Two building blocks are so designed and implemented in a 130nm BiCMOS technology. A two stage cascode LNA which achieves a power gain of 21.14dB at 61.5GHz, -21.2dBm input compression point and a Noise Figure of 4.3dB at 60GHz. The core of the circuit consumes 10.2mW under 1.2V. The 64GHz push-push oscillator operating under 1.8V, 22mA, performs a output power of -14dBm at 68GHz, the tuning range is about 4GHz from 64GHz to 68GHz. Index Terms -millimeter-waves (mm-Waves), low noise amplifier (LNA), Bipolar/BiCMOS integrated circuit, 60GHz, BiCMOS9MW, load pull.978-1-4244-5091-6/09/$25.00 ©2009 IEEE