The dual gate layout configuration has become a versatile approach for compact and high performance MMIC design for commercial, and milita~y/space applications. In this paper, we describe a method that was developed to lifetest compact (0.81 mm') dual gate GaAs P H E W low noise amplifiers (LNAs) operating from DC to 1 GHz. The objective of the lifetest is to evaluate the effect of elevated temperature on low frequency noise performance from 10-40 MHz. The results exhibit a decrease of noise figure (NF) at 10-40 MHz (approximately 0.25 to 0.5 dB) in a dual gate LNA subjected to lifetest at Tof 200°C. This might be attributed to the gate leakage current reduction at either the interface of gate metal-AIGaAs or nitrideAIGaAs, thus possibly reducing the effect of generation-recombination (primary origin of low frequency noise). On the other hand, the change of noise figure at frequency beyond 100 MHZ is not noticeable. In summary, we have demonstrated a method to effectively lifetest a compact and high performance MMIC designed with a dual gate configuration.