Microstructure Measurement Techniques for Studying Electromigration in ULSI Interconnects

Roy, Arijit; Adhikari, Aparna

doi:10.1080/10408436.2015.1135414

Cited by 4 publications

(2 citation statements)

References 78 publications

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“…and is known as cap-layer. Due to the lattice mismatch of Cu and SiN (or capping material), the top surface remains more vulnerable to electromigration and the masstransport in EM is found to be through this interface (Cu/cap-layer) and it is a wellestablished experimental fact [22][23][24][25][26][27].…”

Section: Analytical Atomic Drift-less Model For Submicron Cu Intercon...mentioning

confidence: 99%

“…Thus, the rate of bond-breaking is related to void evolution and its size. On the other hand, in the last four decades, the theory of EM also evolves and a large number of new attributes of this phenomenon are observed [22][23][24][25]. Nevertheless, in a recent review article [24], Sah's atomicdriftless model of EM is still considered to be relevant as it is significantly different from other established models of EM [24], while able to explain the basic observations of EM experiments.…”

Section: Introductionmentioning

confidence: 99%

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Atomic drift-less electromigration model for submicron copper interconnects

Adhikari¹,

Roy²,

Tan³

2022

YMER

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Electromigration in chip level interconnect is commonly described by atomic drift due to electron-wind force that arises from electron-ion momentum transfer. As an alternative to this model, in early 1980’s, Sah proposed a two dimensional analytical ‘void-surface bond-breaking’ model by dropping the atomic drift term that resulted from electron-wind force (in his book ‘Fundamentals of Solid-State Electronics’) and the rate of change of area of void is computed. Due to the continuous down scaling and evolution of interconnect patterning technologies, the void growth process in modern interconnect becomes more complex and electromigration failures are found to be catastrophic in nature instead of gradual type failures observed in early days. In this work, Sah’s model is revisited from the perspective of its applicability to modern submicron copper interconnects. The electromigration-induced resistance change behavior is analytically derived considering a three-dimensional atomic drift-less model. A good correlation between the findings of our model with experimental observations is presented. Keywords: Analytical model, Copper, Drift-less, Electromigration, Resistance change, Time to failure

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Section: Analytical Atomic Drift-less Model For Submicron Cu Intercon...mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Atomic drift-less electromigration model for submicron copper interconnects

Adhikari¹,

Roy²,

Tan³

2022

YMER

Self Cite

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Experimenting and modeling of catastrophic failure in electromigration-induced resistance degradation for deep submicron dual-damascene copper interconnects

Adhikari

Roy

2018

Solid-State Electronics

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High temperature electromigration behavior of cobalt lines observed by in situ transmission electron microscopy

Engler,

Hull

2023

Applied Physics Letters

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As industrial practices shift away from Cu as the initial back-end-of-line interconnect material due to size limitations, new candidate metals are being tested and characterized. Electromigration resistance is particularly important in ultra-narrow lines and an in situ study provides unique insight into the formation and progression of electromigration damage. This, in turn, helps to inform device design so that electromigration resistant circuits can be produced efficiently. In this work, the authors demonstrate an in situ transmission electron microscopy technique for electromigration analysis of Cu replacement metals in microelectronic interconnects. Using this method, candidate metal lines can be tested at high current densities, ∼5×106 A/cm2, at controllable temperatures over the range of 300–1000 °C. In this work, cobalt lines are tested in the range of the effective valence inversion temperature. The analysis examines void nucleation, growth, and migration as a function of temperature and line geometry. We find that there is a relative insensitivity of failure time to operating temperature, with samples tested between approximately 600 and 900 °C having roughly equivalent failure times. We ascribe this result to a combination of linewidth effects and a decrease in the magnitude of the effective valence approaching the inversion temperature. Failure mechanism is also not affected by temperature in this range, with the primary determining factor being the linewidth and corresponding availability of grain boundaries for diffusive mass transport. We also observe increased lifetimes of devices with uniform temperatures compared to those in which large thermal gradients exist.

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Microstructure Measurement Techniques for Studying Electromigration in ULSI Interconnects

Cited by 4 publications

References 78 publications

Atomic drift-less electromigration model for submicron copper interconnects

Atomic drift-less electromigration model for submicron copper interconnects

Experimenting and modeling of catastrophic failure in electromigration-induced resistance degradation for deep submicron dual-damascene copper interconnects

High temperature electromigration behavior of cobalt lines observed by in situ transmission electron microscopy

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