2019
DOI: 10.1088/1361-6528/ab180f
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Microstructural engineering in interface-type synapse device for enhancing linear and symmetric conductance changes

Abstract: The origins of the nonlinear and asymmetric synaptic characteristics of TiO x -based synapse devices were investigated. Based on the origins, a microstructural electrode was utilized to improve the synaptic characteristics. Under an identical pulse bias, a TiO x -based synapse device exhibited saturated conductance changes, which led to nonlinear and asymmetric synaptic characteristics. The formation of an interfacial layer between the electrode and TiO x layer, which can limit consecutive oxygen migration and… Show more

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Cited by 20 publications
(30 citation statements)
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“…[30,36,[52][53][54]115] Several studies have confirmed the possibility of interfacial switching in RRAM. [42,[55][56][57][58][59] Goux et al reported an ultra-thin 1-nm Al 2 O 3 interface in TiN/HfO 2 /Hf RRAM, which can minimize I SET to sub-500 nA. [30] The higher HRS in these devices originates from the large bandgap of the Al 2 O 3 layer.…”
Section: Resistive Switching Properties and The Impact Of Doping/allo...mentioning
confidence: 99%
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“…[30,36,[52][53][54]115] Several studies have confirmed the possibility of interfacial switching in RRAM. [42,[55][56][57][58][59] Goux et al reported an ultra-thin 1-nm Al 2 O 3 interface in TiN/HfO 2 /Hf RRAM, which can minimize I SET to sub-500 nA. [30] The higher HRS in these devices originates from the large bandgap of the Al 2 O 3 layer.…”
Section: Resistive Switching Properties and The Impact Of Doping/allo...mentioning
confidence: 99%
“…Pt/HfO 2 /TiO x /Pt [42] 2 nm free -2 +0.5 46 nA 454 --10 2 @ 25 Pt/TiO 2-x /TiO 2 /Pt [43] 40 nm +2 +1.5 -1.4 750 µA 50 ---TiN/a-Si/ TiO 2 /TiN [56] -Free -3 +6 1 µA 100 -10 6 10 8 @ 55 W/WO x /HfO 2 /Pd [57] 1 µm Free +1.5 -3 100 µA 100 100 ns 10 9 10 4 @ 85 W/WO x /AlO x /IrO x [59] 4 µm Free +1.5 -1 30 µA 500 -10 5 10 4 @ 85 TiN/TiO x /Mo [58] 50 nm Free +3 -2.5 100 nA 10 ---filamentary switching can experience nanosecond speed, which can be further scaled down by scaling of charging time of crossbar devices. Lee et al achieved a 300-ps switching speed in HfO xbased RRAM.…”
Section: Interfacialmentioning
confidence: 99%
“…In this work, however, we exploit the switching mechanism of the Mo/TiO x -based RRAM, i.e., area-dependent conductance scaling, to implement the gain at the device level. Previously, we reported a microstructural engineered Mo/TiO x RRAM for electronic synapse applications ( Park et al, 2019 ); the study presented some promising synaptic features of the Mo/TiO x RRAM, such as gradual and linear conductance programming. However, the present expanded work adds significantly more explanatory details regarding the areal dependency of the conductance precision, which is utilized to construct a hybrid synapse.…”
Section: Rram-based Hybrid Synapsementioning
confidence: 99%
“…First, we deposited a 15 nm thick TiO x layer through RF sputtering process by using a ceramic Ti 4 O 7 target at room temperature. Then, 50 nm thick Mo top electrode was deposited by the sputtering system ( Park et al, 2019 ). The device structure and composition of each layer are shown in Figure 3A via transmission electron microscopy (TEM) image and its energy dispersive X-ray spectroscopy (EDS) line profile.…”
Section: Rram-based Hybrid Synapsementioning
confidence: 99%
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