Microstructural and electrical properties of Cu-germanide formed on p-type Ge wafer

Jyothi, I.; Janardhanam, V.; Hwang, Jun Yeon; Lee, Won‐Ki; Park, Yun Chang; Kang, Hyon Chol; Lee, Sung‐Nam; Choi, Chel‐Jong

doi:10.1016/j.jallcom.2015.09.197

Cited by 6 publications

(1 citation statement)

References 28 publications

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“…have been proven by experiment. [24][25][26][27][28][29] In addition, the device operating temperature has been varied from 250 to 350 K to study the effect of temperature. Synopsys Sentaurus technology computer aided design (TCAD) tools are used as simulation platform.…”

Section: Device Structure and Simulation Parametersmentioning

confidence: 99%

Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

Liu¹,

Cheng²,

Zhang³

et al. 2017

Jpn. J. Appl. Phys.

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A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

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