The PAE and output power of this PA module are measured as a function of the third-stage gate bias, as shown in Figure 10. From the figure, the output power increases as the gate-bias voltage increases, while the PAE decreases with an increasing gate bias.
CONCLUSIONIn this paper, a modified level-3 technique has been presented for the nonlinear modeling of an RF LDMOS FET. This method takes advantage of a fast and easy modeling process. The design of the PA module uses the extracted parameters, which allows us to verify a large-signal analysis. The measurement results of the output power for the designed PA module are 30.3 dBm with PAE of 64% at 880 MHz.The LDMOS PA module presented in this paper introduces techniques, such as HTN and WTN, to accomplish the proper optimization between output power and PAE.
SIX-PORT REFLECTOMETER BASED ON FOUR 0°/180°MICROSTRIP RING COUPLERS