Microprocessor implementation of new optimal PWM switching strategies

Bowes, S.R.; Midoun, A.

doi:10.1049/ip-b.1988.0030

Cited by 46 publications

(16 citation statements)

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“…The high frequency carrier signal is generated using an up-down counter which is readily available in microcontrollers for motion control. The programmed PWM, on the other hand, is implemented by storing offline calculated commutation angles in lookup tables and then recalled for PWM generation using dedicated digital logic circuit [8], [13], [14]. Therefore the microcontrollers that have digital hardware catered for carrier based PWM and cannot be easily modified for programmed PWM generation.…”

Section: Introductionmentioning

confidence: 99%

Implementation and experimental validation of efficiency improvement in PMSM drives through switching frequency reduction

Kshirsagar¹,

Krishnan

2016

2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

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Energy efficiency improvement in variable speed motor drives is of widespread interest because of the rising cost of energy. Permanent magnet synchronous motor (PMSM) drives are especially favored in variable speed applications due to their high efficiency of operation. This research focuses on improving efficiency of the PMSM drive system by reducing the switching frequency of the inverter driving the motor. At reduced switching frequencies, programmed pulse width modulation methods that results in elimination or reduction of the low ordered sidebands of the currents are considered in this work. The study showcases new implementation aspects of programmed PWM and closed loop current control at reduced switching frequencies necessary to operate the PMSM drive system at higher efficiency. The experimental measurements validate the total system efficiency improvement at reduced switching frequencies.

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Section: Introductionmentioning

confidence: 99%

Implementation and experimental validation of efficiency improvement in PMSM drives through switching frequency reduction

Kshirsagar¹,

Krishnan

2016

2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

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“…6 indicates that the feedback gain K f acting through the frequency W R has been operative through Eqs. (6), (8) and Fig. 7, and Kp = 0.0625 in Fig 8. As expected, the decrease in K p reduces the damping of the transients as a comparision between Fig.…”

Section: Resultsmentioning

confidence: 96%

“…, (7) and(8) to compute the voltage angle 6 and the angular frequency w~ based on the value of the dc link voltage Vdc.Processor P 3 manages the interface with the HVdc converter. It controls the sampling of dc link voltage v d , and current Idc.In addition, it computes the pulse width data for the 4 timers of the PWM Counter by using the output 6 and WR from P2, and the output V, from PI.Data ExchangeFig.…”

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confidence: 99%

Concurrent microprocessors-based PWM converter control

Guo

Wang

Lee

et al.

Conference Record of the 1990 IEEE Industry Applications Society Annual Meeting

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Fairly sophisticated controls are needed to achieve concurrent multiple objectives of pulse-width-modulation (PWM) converters. The objectives may include near sinusoidal current waveforms, fine dc voltage or current regulation, and specified power factor. The paper describes the application of a system of three high speed digital signal processors to implement these controls in real time. The voltage angle lock loop control of a voltage source (boost-type) converter for high voltage direct current system is presented. Experimental results confirm that the digitally controlled system can realize the full potential oi the PWM converter.

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“…The valves are activated by the multiprocesor system through the opto-couplers and base drivers. The "four timer" method [15] was used to implement sinusoidal PWM (SPWM) for generating the timing sequence for switching. In this illustrative application, the converter acts as a voltage regulator.…”

Section: Illustrative Applicationmentioning

confidence: 99%

A multiprocessor digital signal processing system for real-time power converter applications

Guo

Lee

Wang

et al.

[Proceedings] Conference Papers 1991 Power Industry Computer Application Conference

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This paper describes the design of a multiprocessor digital signal processing system for applications in power converters such as those that would be used in the next generation of HVdc and SVC [1,2] systems. The system incorporates three high-speed digital signal processors operating independently in parallel, but communicating with one another. The fully programmable system is a powerful device which can implement sophisticated control algorithms in real time for converters. A prototype operating at a clock frequency of 40 MHz has been built for testing and evaluation of control strategies with a laboratory model of an experimental HVdc system based on pulse width modulation (PWM). The results from an illustrative application demonstrate that the design is well suited for real-time digital control of converters and the system is a useful tool for research and development.

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Microprocessor implementation of new optimal PWM switching strategies

Cited by 46 publications

References 0 publications

Implementation and experimental validation of efficiency improvement in PMSM drives through switching frequency reduction

Implementation and experimental validation of efficiency improvement in PMSM drives through switching frequency reduction

Concurrent microprocessors-based PWM converter control

A multiprocessor digital signal processing system for real-time power converter applications

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