2013
DOI: 10.1088/0960-1317/23/3/035011
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Micromachined stress-free TSV hole for AlGaN/GaN-on-Si (1 1 1) platform-based devices

Abstract: This paper presents a micromachined stress-free through silicon via (TSV) backend process for AlGaN/GaN-on-Si (1 1 1) platform-based devices, which was processed by assisted back grinding, chemical mechanical polishing, deep reactive ion etching (DRIE) and copper (Cu) electroplating for the TSV. The metal-filled TSV structure was formed to enhance thermal conduction from the frontend terminal to the backend terminal, especially the source region of the AlGaN/GaN-on-Si (1 1 1) platform-based RF power devices. A… Show more

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Cited by 3 publications
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“…8(a). (ii) Three TSVs are in a row, with the spacing between the two TSVs being 10 µm, [12] as shown in Fig. 8(b).…”
Section: Three Tsvs Analysismentioning
confidence: 99%
See 1 more Smart Citation
“…8(a). (ii) Three TSVs are in a row, with the spacing between the two TSVs being 10 µm, [12] as shown in Fig. 8(b).…”
Section: Three Tsvs Analysismentioning
confidence: 99%
“…The CTE mismatch between copper and silicon causes inevitable stress on silicon and results in material failure. [10][11][12][13][14][15] It will also affect the performance of devices which are around the TSV and reduce the life of the electronic device. [16,17] Furthermore, the design parameters, such as the thickness and materials of Cu diffusion barrier and liner, have an impact on the mechanical reliability.…”
Section: Introductionmentioning
confidence: 99%