Microcontroller-Based Peak Current Mode Control Using Digital Slope Compensation

Hallworth, Michael; Shirsavar, S.A.

doi:10.1109/tpel.2011.2182210

Cited by 104 publications

(52 citation statements)

References 24 publications

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“…It is well known that sub-harmonic oscillations may occur in digitally controlled DC-DC switching converters [18][19][20]. Therefore, it is necessary to investigate the stabilities of above current control algorithms, where the ACS control strategy is used.…”

Section: Analysis and Elimination Of Sub-harmonic Oscillationmentioning

confidence: 99%

“…In this paper, the digital slope compensation (DSC) method [19], [20] is used to eliminate the sub-harmonic oscillations for the ACS peak current control. As shown in Fig.…”

Section: B Elimination Of Sub-harmonic Oscillationsmentioning

confidence: 99%

“…On account of its obvious advantages, such as the flexibility to implement complicated control strategies and algorithms, the programmability to realize reconfigurable power systems, faster design process, high power conversion efficiency, robustness to noise, and insensitivity to parameter drifts of components, the digitally controlled DC-DC switching converter has gained a great deal of attention in the fields of power electronics and integrated circuits [1]- [20]. In order to improve the transient response features and to reduce the sizes of the passive filter components (inductor and capacitor), the switching frequency of the DC-DC converter is ever-increased.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Wei¹,

Wang²,

Li³

et al. 2016

Journal of Power Electronics

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A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

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Section: Analysis and Elimination Of Sub-harmonic Oscillationmentioning

confidence: 99%

“…In this paper, the digital slope compensation (DSC) method [19], [20] is used to eliminate the sub-harmonic oscillations for the ACS peak current control. As shown in Fig.…”

Section: B Elimination Of Sub-harmonic Oscillationsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Wei¹,

Wang²,

Li³

et al. 2016

Journal of Power Electronics

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“…Besides, we take a V 2 C-mode-controlled buck converter as an example to recognize the nonlinear dynamic behaviors by the improved mLCE. Additionally, for the recognized chaotic behaviors, many methods have been proposed to suppress them, such as Ott Grebogi Yorke (OGY) method [8], timedelayed feedback control method (TDFC) [9], slope compensation method [10], and others [11], but these all depend on circuit parameters of the Buck converter, and determine the desired targeting orbits in advance. In order to solve the problem, paper [12] proposed a method only depends on an external parameter named the coupling strength after finding the fact that the chaos behavior can be suppressed by increasing the correlation of system state variables.…”

Section: Introductionmentioning

confidence: 99%

Nonlinear dynamic analysis in the V<sup>2</sup>C-mode-controlled buck converter by improved mLCE

Mao

et al. 2016

IEICE Electron. Express

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In this paper, an improved computation method of maximal Lyapunov character exponent (mLCE) is proposed to analyze the nonlinear dynamic behaviors in the V 2 C-mode-controlled buck converter. In this method, a compensation algorithm of the Jacobi matrix at the non-differentiable point is given after analyzing the geometric relationship between the two subsystems on both sides of the switching surface. Besides, according to the fact that the chaos control can be realized by increasing the correlation of system state variables, the coupling strength ε is introduced to the system of V 2 C-mode-controlled buck converter and optimized by particle swarm optimization (PSO), in order to eliminate the recognized chaotic behaviors. Finally, the effectiveness of the given method is validated by a simulation and an experimental setup.

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“…Furthermore, it becomes impossible to achieve this for high frequency applications. A solution using a mixed-signal implementation for DC-DC converters has been discussed in [14]. However, for DC -AC applications, the inverter requires a peak-to-valley controlmode transition in every swing cycle.…”

Section: Introductionmentioning

confidence: 99%

Peak-Valley Current Mode Controlled H-Bridge Inverter with Digital Slope Compensation for Cycle-by-Cycle Current Regulation

Manoharan¹,

Ahmed²,

Park³

2015

Journal of Electrical Engineering and Technology

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-In this paper, digital peak current mode control for single phase H-bridge inverters is developed and implemented. The digital peak current mode control is achieved by directly controlling the PWM signals by cycle-by-cycle current limitation. Unlike the DC-DC converter where the output voltage always remains in the positive region, the output of DC-AC inverter flips from positive to negative region continuously. Therefore, when the inverter operates in negative region, the control should be changed to valley current mode control. Thus, a novel control logic circuit is required for the function and need to be analyzed for the hardware to track the sinusoidal reference in both regions. The problem of sub-harmonic instability which is inherent with peak current mode control is also addressed, and then proposes the digital slope compensation in constant-sloped external ramp to suppress the oscillation. For unipolar PWM switching method, an adaptive slope compensation in digital manner is also proposed. In this paper, the operating principles and design guidelines of the proposed scheme are presented, along with the performance analysis and numerical simulation. Also, a 200W inverter hardware prototype has been implemented for experimental verification of the proposed controller scheme.

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Microcontroller-Based Peak Current Mode Control Using Digital Slope Compensation

Cited by 104 publications

References 24 publications

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

Nonlinear dynamic analysis in the V<sup>2</sup>C-mode-controlled buck converter by improved mLCE

Peak-Valley Current Mode Controlled H-Bridge Inverter with Digital Slope Compensation for Cycle-by-Cycle Current Regulation

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