Methods for automated testing of phased-array subarrays

A conductive shielded compact antenna hat for inverted‐F antennas

“…When the layout of the transistor is symmetrical, C pg is equal to C pd which means that C gs should be equal to C ds [2,6,13], thus Im(Y 11 1Y 12 ) is equal to Im(Y 22 1Y 12 ), and the parasitic capacitances can be easily computed using [2].…”

“…The extraction of parasitic capacitances of microwave FETs is a complex problem from the mathematical point of view, since there are more unknown variables than equations. Thus works like [1,2] make several assumptions to reduce the complexity of the problem. Other works, such as [3][4][5][6], follow the philosophy of [1,2] and make other assumptions, for example, that the intrinsic drain to source capacitance (C ds ) has a relation with C pd [3] or with the intrinsic gate to source capacitance (C gd ) [5,6].…”

“…Even using the assumptions proposed in [1][2][3][4][5][6], the parasitic capacitance C pd is the most difficult to extract since it is not possible separate the influence of C ds from C pd . Therefore, for GaN technology some works such as [7,8] proposed a new small signal electrical equivalent circuit (SSEEC) and continue using the methodology presented in [1,2]. In other works, a number of GaN FETs with different gate lengths [9] or the pad structure [10] were built and afterward C pd was determined.…”

“…Moreover, the diode capacitance is computed with a low DC current at the gate. This fact is unusual, since the classical theory [1,2] differs from this point of view.…”

“…The antenna hats (or antenna test coupler) have been primarily developed to test the onboard system of satellites and the design process has not been introduced well . In this application, the hats could be designed with little restriction of total size because antennas mostly do not have physical interferences around them.…”