Methods and Designs for Improving the Signal Integrity of Vertical Interconnects in High Performance Packaging

Abstract

Abstract-Design of high performance package interconnects using full-wave electromagnetic solvers is necessary due to increased operation speed, miniaturization and vertical 3D integration. Thus the segmented study and optimization is becoming inevitable for designers to improve the signal integrity of IC packaging. This paper addresses alternative methods and optimal designs on several components and structures for package electrical interconnects, including voiding technique, padless via implementation, spiral micro-via stacking and signal/ground layout pin patterns. The simulation results have been presented to demonstrate the improvements of optimized schemes. These methodologies could be treated as handy references and general guidelines applicable to different package designs and could result in significant improvements of overall package signal integrity performance.

Equivalent Circuit Model of Coaxial Probes for Patch Antennas

“…Many authors have found a transverse electromagnetic (TEM) field distribution across the probe aperture is a reasonable approximation for simulations of coaxial probes [1][2][3][4][5][6][7]. Therefore, a coaxial probe feeding a patch antenna can be viewed as a mode-converter which converts the TEM mode across the probe aperture into the parallel plate modes.…”

“…It is regarded as the most accurate probe feeding model for both the radiation pattern and the input impedance simulations as all the propagating and evanescent parallel plate modes are included [1][2][3][4][5][6][7]. However, magnetic-frill model requires special treatment of the probe exciting source, very dense meshes or subgridding (subcell) techniques in FEM and FDTD solvers [9][10][11][12].…”

A Noise Suppression Technique Using Dual Layer Spirals With Various Ground Structure for High-Speed PCBS

“…To achieve a return current path and eliminate the return path discontinuity (RPD) there are several solution to resolve the problem [2,3]. In addition, there are also studies on chip/package level noise reduction methods and organization of power ground stack-up to enhance the SI [4,5]. Various noise suppression techniques have been introduced in the previous documents for stable operation of the PDN [5][6][7][8][9][10][11][12][13][14][15].…”

Estimating the Reduction of Radiated Emissions From TFT-LCD Panel Using Network Analyzer With a Bulk Current Injection Probe

“…The main problem is the lack of reliable and convenient methods for analyzing and predicting PCB radiation. Until now, therefore, methods of diagnosing and solving problems of PCB radiated emissions have mainly relied on experimental techniques [1][2][3]. The difficulty in methods of predicting PCB radiated emissions by simulation is the combination of circuit and electromagnetic models of practical interactions between integrated circuits and PCB traces [4].…”