Stable equivalent circuit models cannot be guaranteed by currently available EM simulation tooling, resulting in non-convergence in time-domain simulations. Theoretically it is proven that available MOR methods preserve stability and passivity in the reduction process. Implementation of MOR methods and the realization of equivalent circuit models for actual use in circuit simulation are not straightforward. This paper describes the successful implementation of a MOR method, allowing the generation of equivalent circuit models suitable for time domain simulation. Two examples of time-domain simulations performed on real-life interconnect structures are given.
IntroductionThe development of today's complex electronic products (e.g. mobile phones, Bluetooth) requires accurate computer simulations. For radio frequency (RF) designs in particular, many parts of the physical system, such as IC (integrated circuit) packages, PCBs (printed circuit boards) and printed components (and also the coupling between them) can only be simulated accurately using numerical electromagnetic field analysis [1,2]. In general, this results in very large matrix systems to be solved, which can be virtually impossible.For the electromagnetic analysis of complex interconnect structures, the layout simulation tool Fasterix was developed. In Fasterix the interconnect structure is discretized and a boundary element method is used to model the structure as a lumped RLC circuit. In the current implementation, the sometimes very large RLC circuit is represented in a compact way by making use of the so-called 'supernode algorithm ' [3], which generates a compact equivalent circuit model for use in circuit simulation. However, since the stability of these models is not guaranteed, transient circuit simulations often result in convergence problems.In order to remedy these instabilities, a number of Model Order Reduction (MOR) methods, preserving stability and passivity, have been investigated. MOR replaces large systems by smaller, computationally more flexible ones, with approximately the same behaviour. Especially Krylov-subspace methods have shown themselves to be very accurate and suited for this area of application [4,5]. These Krylov-subspace methods are well known and used in many different applications. Not only linear time invariant (LTI) systems can be subject of these methods, also weakly non-linear or quadratic models are treated in the same way as LTI systems [6]. An important issue in reducing the size of models is the preservation of passivity. In order to be able to use the model in circuit simulation, the realization of an equivalent circuit is essential.The application of Model Order Reduction methods in the layout simulator Fasterix demands a robust implementation suitable for relatively large problems, consisting of singular and non-singular matrices. Several issues of the implementation will be discussed in this paper.Further, the realization of the reduced model is addressed. The models of the layout simulator are descr...