Metal–organic cages for gas adsorption and separation

Abstract

In this highlight, we summarize the design principle and representative examples of MOCs for gas adsorption and separation, with the aim of providing a theoretical basis for designing more MOCs that can adsorb and purify gas.

Additive-Assisted Forming High-Quality Thin Films of Sn–Oxo Cluster for Nanopatterning

“…They possess tailorable structures at the atomic level. Recently, various controllable methods for preparing stable MOCs with diverse metal centers and outer organic ligands have been developed, laying the foundation for their functional regulation and application explorations. − Thus, far, MOCs have gained interest in various areas, including catalysis, gas adsorption and separation, biomedicine, and nonlinear optics. , Recently, considerable efforts have been devoted to promoting the use of MOCs in advanced photolithography, e.g., extreme-ultraviolet lithography (EUVL; 13.5 nm), state-of-the-art techniques in the semiconductor industry to manufacture sub-5 nm node chips. − The properties of MOCs, including small sizes, well-defined structures, high extreme-ultraviolet (EUV) absorption cross sections, and high reactivity under EUV irradiation, make them promising photoresists for EUVL. − Accordingly, designing and tuning these properties and understanding their fundamental chemistry under EUV irradiation are essential to promote their applications.…”

“…Recently, various controllable methods for preparing stable MOCs with diverse metal centers and outer organic ligands have been developed, laying the foundation for their functional regulation and application explorations. 1−4 Thus, far, MOCs have gained interest in various areas, including catalysis, 5 gas adsorption and separation, 6 biomedicine, 7 and nonlinear optics. 8,9 Recently, considerable efforts have been devoted to promoting the use of MOCs in advanced photolithography, e.g., extremeultraviolet lithography (EUVL; 13.5 nm), state-of-the-art techniques in the semiconductor industry to manufacture sub-5 nm node chips.…”