Memristor Synapses for Neuromorphic Computing

Abstract

Neuromorphic computing, which imitates the principle behind biological synapses with a high degree of parallelism, has recently emerged as a promising candidate for novel and sustainable computing technologies. The first step toward realizing a massively parallel neuromorphic system is to develop an artificial synapse capable of emulating synapse functionality, such as analog modulation, with ultralow power consumption and robust controllability. We begin this chapter with a simple description of neuromorphic systems and memristor synapses. Further, we introduce and evaluate the state-of-the-art neuromorphic hardware technology in terms of novel functional materials and device architectures toward the implementation of fully neuromorphic computers, which have been extensively explored in recent years. Finally, we briefly describe artificial neural networks based on memristor synapse in forms of crossbar arrays.Conventional computing architecture, that is, von Neumann architecture, forms the groundwork for modern computing technologies [3,18]. Despite tremendous growth in computing performance, classical architecture currently suffers from the von Neumann bottleneck, which results from data movements between the processor and the memory unit [4,5]. The memory wall issue, causing high power consumption and low speed, hinders the continuous development of computing technologies [4,5,9]. Moreover, artificial neural network (ANN) algorithms, such as deep learning [19], deal with image classification [20,21], sound recognition [22,23], specific complex tasks (e.g., the AlphaGo [24]) and so on. Although the ANN algorithms have exhibited superior performance over the conventional computing technologies, they are, at present, constructed on the von Neumann architecture; hence, considerable time and energy resources are required for their operation [8,9]. Neuromorphic architecture [6,7], a bio-inspired computing architecture, is one of the most promising candidates to resolve these problems. The neuromorphic systems take advantage of the cerebral nervous system, which consists of a massive parallel connectivity between the neurons (i.e., processor) and the synapses (i.e., memory), indicating the absence of the von Neumann bottleneck [8,9]. Figure 1 shows the shift of the computing architecture from von Neumann architecture (Figure 1a) to neuromorphic architecture (Figure 1b). The von Neumann architecture shows that the processor and memory are separate, leading to the von Neumann bottleneck. In contrast, in the case of neuromorphic architecture, the neurons and synapses are combined, alleviating the bottleneck issue. The neurons are uncomplicated computing units, the synapses are local memory units, and the communication channels (red line) connect numerous neurons and synapses. It should be noted that the practical purpose of neuromorphic systems is not to replace the von Neumann architecture completely, but to supplement the conventional architecture to make up its leeway, especially for intelligent tasks such as image r...

Neuromorphic Computing Using Emerging Synaptic Devices: A Retrospective Summary and an Outlook

“…Neuromorphic computing has been researched over the decades, and recently, there would be significant advancements. The recent enhancement can be categorized with three major steps as shown in Figure 3 [16][17][18]. The first step is a GPU-Centric system that uses a graphics processing unit (GPU) to support artificial intelligence, optimized for parallel operation, and is mainly utilized in learning.…”

Soft eSkin: distributed touch sensing with harmonized energy and computing

“…For instance, oneand two-dimensional layered materials and composites [87,[94][95][96][97][98][99][100][101][102][103], binary oxides [78,[104][105][106], nitrides [107,108], etc. In addition to storage, memristors with multiple analogue states are capable of actively processing information, via in-memory computing scheme [79,81,109,110]. A memristors-based hardware approach is proposed here for neuromorphic tactile skin, a comparison of various eNVM devices is given in table 1 [81,82,[111][112][113], where these devices are compared in terms of efficient and distributed computing along with data storage.…”

“…A neuromorphic chip designed and fabricated by IBM, which has approximately five times the number of transistors of an Intel processor, consumes approximately 65-75 mW of power [127]. The foremost challenge for the realization of wide-scale parallel neuromorphic systems lies within the development of an artificial synapse capable of emulating synapse functionality; for instance, analogue modulation along with ultralow power consumption and robust controllability [76][77][78]109].…”

“…Neuromorphic computing, based on the computing models by Mead in 1990 [77] to replicate the cognitive functionality of human brain/biological synapses with high degree of parallelism, has recently come into prominence for sustainable computing technologies [109]. The major difference which attracts attention to neuromorphic computing architecture towards data centric and computation is its minimal power consumption [109]. The human brain is fantastically powerefficient and performs a host of activities including decision-making, reasoning and concurrent recognition, while a supercomputer consumes MWs [126].…”

“…Reducing the size of memristor devices may also help to lower the programming current and as a result leads to reduced power consumption. The state-of-the-art memristor feature size reported is around 10 nm, while in theory, it can be scaled to the atomic level [54,73,78,79,81,104,109,134,164]. In addition, the cognitive operations in the high-dimensional space rely on large amounts of weights, thus requiring high density of memristor.…”