Memristor-based neural networks: Synaptic versus neuronal stochasticity

Abstract

In neuromorphic circuits, stochasticity in the cortex can be mapped into the synaptic or neuronal components. The hardware emulation of these stochastic neural networks are currently being extensively studied using resistive memories or memristors. The ionic process involved in the underlying switching behavior of the memristive elements is considered as the main source of stochasticity of its operation. Building on its inherent variability, the memristor is incorporated into abstract models of stochastic neurons and synapses. Two approaches of stochastic neural networks are investigated. Aside from the size and area perspective, the impact on the system performance, in terms of accuracy, recognition rates, and learning, among these two approaches and where the memristor would fall into place are the main comparison points to be considered.

Neuromemristive Circuits for Edge Computing: A Review

“…The variable threshold of the memristor allows to randomize the firing threshold of the neuron and ensures random neuron spiking behavior. This stochastic memristor based neuron model tested for the architectures with 16 and 32 stochastic neurons is proposed in [73]. The stochastic neuron with memristor allows removing random number generator from the stochastic circuits.…”

“…The application of the stochastic neurons for digits recognition problem is investigated in [73]. The accuracy that can be achieved is about 60 % for a system with stochastic neurons and 65 % for the stochastic synapses.…”

Weight Update Generation Circuit Utilizing Phase Noise of Integrated Complementary Metal–Oxide–Semiconductor Ring Oscillator for Memristor Crossbar Array Neural Network‐Based Stochastic Learning

“…However, the weight initialization is not required for the stochastic learning, where the weight is updated in a stochastic manner based on the updating probability . Although previous studies proposed utilizing the inherent cycle‐to‐cycle variation of a memristor device to obtain such stochastic behavior, apparently its demonstration is yet to be presented, given the high cell‐to‐cell variation of memristors, and the nonuniform voltage drop across the CBA, which exacerbates with increasing array size and scaling due to the presence of array leakage currents . This poses a huge concern especially for an analog switching.…”

A Neuromorphic Device Implemented on a Salmon‐DNA Electrolyte and its Application to Artificial Neural Networks

“…Such devices could gradually change the conductance of the path of current according to input voltage pulses, [16,[21][22][23][24][25][26][27] thereby allowing for the implementation of the functional operation of a synapse within a unit device. [28,29] Recently, HfO x -, [30] TaO x -, [31,32] or TiO x - [33,34] based ReRAM devices and Ge 2 Sb 2 Te 5 - [16,35,36] or Mott-insulator- [37] based PCRAM devices have successfully emulated synaptic dynamics, such as LTP/ LTD characteristics and excitatory/inhibitory postsynaptic currents (EPSC/IPSC). [28,29] Recently, HfO x -, [30] TaO x -, [31,32] or TiO x - [33,34] based ReRAM devices and Ge 2 Sb 2 Te 5 - [16,35,36] or Mott-insulator- [37] based PCRAM devices have successfully emulated synaptic dynamics, such as LTP/ LTD characteristics and excitatory/inhibitory postsynaptic currents (EPSC/IPSC).…”

“…In particular, studies on memristive synapses have demonstrated that high‐density HNNs can be constructed via fabrication in a crossbar point array structure . Recently, HfO x ‐, TaO x ‐, or TiO x ‐ based ReRAM devices and Ge 2 Sb 2 Te 5 ‐ or Mott‐insulator‐ based PCRAM devices have successfully emulated synaptic dynamics, such as LTP/LTD characteristics and excitatory/inhibitory postsynaptic currents (EPSC/IPSC). Prezioso et al fabricated a neural network based on an Al 2 O 3 /TiO 2 x memristor crossbar point array and demonstrated successful pattern classification of 3 × 3 binary images.…”