Memristive dynamics enabled neuromorphic computing systems

Yan, Bonan; Yang, Yuchao; Huang, Ru

doi:10.1007/s11432-023-3739-0

Cited by 7 publications

(2 citation statements)

References 94 publications

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“…A transistor is a multiterminal electronic device that has been investigated substantially [22][23][24][25]. It can be used for information detection and some memristive systems [26][27][28], indicating the possible application of transistors as synaptic devices in neuromorphic computing. Transistor-based synaptic devices have the advantage of synergistic control capabilities arising from their multigate characteristics [29], and they are expected to mimic synaptic plasticity with a considerable dynamic range and superior linearity [30].…”

Section: Introductionmentioning

confidence: 99%

Transistor-Based Synaptic Devices for Neuromorphic Computing

Huang,

Zhang,

Lin

et al. 2024

Crystals

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Currently, neuromorphic computing is regarded as the most efficient way to solve the von Neumann bottleneck. Transistor-based devices have been considered suitable for emulating synaptic functions in neuromorphic computing due to their synergistic control capabilities on synaptic weight changes. Various low-dimensional inorganic materials such as silicon nanomembranes, carbon nanotubes, nanoscale metal oxides, and two-dimensional materials are employed to fabricate transistor-based synaptic devices. Although these transistor-based synaptic devices have progressed in terms of mimicking synaptic functions, their application in neuromorphic computing is still in its early stage. In this review, transistor-based synaptic devices are analyzed by categorizing them into different working mechanisms, and the device fabrication processes and synaptic properties are discussed. Future efforts that could be beneficial to the development of transistor-based synaptic devices in neuromorphic computing are proposed.

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Section: Introductionmentioning

confidence: 99%

Transistor-Based Synaptic Devices for Neuromorphic Computing

Huang,

Zhang,

Lin

et al. 2024

Crystals

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“…Despite their good performance and energy efficiency, these works still encounter bottlenecks in the aspects of storage and memory access of synaptic state variables, restricted by the memory wall of the von Neumann architecture. As a device fusing computation and storage, the memristor offers the potential for in-memory computation of trace variables [25]. Recently, the inherent PCM conductance drift was exploited to realize the eligibility trace in reinforcement learning [26].…”

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confidence: 99%

A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning

Wang

et al. 2023

IEEE Trans. Biomed. Circuits Syst.

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The memristor has been extensively used to facilitate the synaptic online learning of brain-inspired spiking neural networks (SNNs). However, the current memristor-based work can not support the widely used yet sophisticated tracebased learning rules, including the trace-based Spike-Timing-Dependent Plasticity (STDP) and the Bayesian Confidence Propagation Neural Network (BCPNN) learning rules. This paper proposes a learning engine to implement trace-based online learning, consisting of memristor-based blocks and analog computing blocks. The memristor is used to mimic the synaptic trace dynamics by exploiting the nonlinear physical property of the device. The analog computing blocks are used for the addition, multiplication, logarithmic and integral operations. By organizing these building blocks, a reconfigurable learning engine is architected and realized to simulate the STDP and BCPNN online learning rules, using memristors and 180 nm analog CMOS technology. The results show that the proposed learning engine can achieve energy consumption of 10.61 pJ and 51.49 pJ per synaptic update for the STDP and BCPNN learning rules, respectively, with a 147.03× and 93.61× reduction compared to the 180 nm ASIC counterparts, and also a 9.39× and 5.63× reduction compared to the 40 nm ASIC counterparts. Compared with the state-of-the-art work of Loihi and eBrainII, the learning engine can reduce the energy per synaptic update by 11.31× and 13.13× for trace-based STDP and BCPNN learning rules, respectively.

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Fully Hardware Memristive Neuromorphic Computing Enabled by the Integration of Trainable Dendritic Neurons and High‐Density RRAM Chip

Yang,

Yue,

Liu

et al. 2024

Adv Funct Materials

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Computing‐in‐memory (CIM) architecture inspired by the hierarchy of human brain is proposed to resolve the von Neumann bottleneck and boost acceleration of artificial intelligence. Whereas remarkable progress has been achieved for CIM, making further improvements in CIM performance is becoming increasingly challenging, which is mainly caused by the disparity between rapid evolution of synaptic arrays and relatively slow progress in building efficient neuronal devices. Specifically, dedicated efforts are required toward developments of more advanced activation units in terms of both optimized algorithms and innovative hardware implementations. Here a novel bio‐inspired dendrite function‐like neuron based on negative‐differential‐resistance (NDR) behavior is reported and experimentally demonstrates this design as a more efficient neuron. By integrating electrochemical random‐access memory (ECRAM) with ionic regulation, the tunable NDR neuron can be trained to enhance neural network performances. Furthermore, based on a high‐density RRAM chip, fully hardware implementation of CIM is experimentally demonstrated by integrating NDR neuron devices with only a 1.03% accuracy loss. This work provides 516 × and 1.3 × 105 × improvements on LAE (Latency‐Area‐Energy) property, compared to the digital and analog CMOS activation circuits, respectively. With device‐algorithm co‐optimization, this work proposes a compact and energy‐efficient solution that pushes CIM‐based neuromorphic computing into a new paradigm.

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Memristive dynamics enabled neuromorphic computing systems

Cited by 7 publications

References 94 publications

Transistor-Based Synaptic Devices for Neuromorphic Computing

Transistor-Based Synaptic Devices for Neuromorphic Computing

A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning

Fully Hardware Memristive Neuromorphic Computing Enabled by the Integration of Trainable Dendritic Neurons and High‐Density RRAM Chip

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