Memristive Data Ranking

Prasad, Ananth Krishna; Rezaalipour, Morteza; Dehyadegari, Masoud; Bojnordi, Mahdi Nazm

doi:10.1109/hpca51647.2021.00045

Cited by 14 publications

(2 citation statements)

References 61 publications

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“…This reduces the complexity of the control part of the architecture. In [33], the authors have proposed a general hardware/software design to achieve efficient sorting of floating point numbers for data ranking. However, the mechanism imposes a custom design, which is not adapted for in-memory computing of BNNs.…”

Section: B Bnn Layer In-memorymentioning

confidence: 99%

MOL-Based In-Memory Computing of Binary Neural Networks

Ali

Baghdadi

Dupraz

et al. 2022

IEEE Trans. VLSI Syst.

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Convolutional neural networks (CNN) have proven very effective in a variety of practical applications involving Artificial Intelligence (AI). However, the layer depth of CNN deepens as user applications become more sophisticated, resulting in a huge number of operations and increased memory size. The massive amount of the produced intermediate data leads to intensive data movement between memory and computing cores causing a real bottleneck. In-Memory Computing (IMC) aims to address this bottleneck by directly computing inside memory, eliminating energy-intensive and time-consuming data movement. On the other hand, the emerging Binary Neural Networks (BNN), which is a special case of CNN, shows a number of hardware-friendly properties including memory saving. In BNN, the costly floating-point multiply-and-accumulate is replaced with lightweight bit-wise XNOR and popcount operations. In this paper, we propose an IMC programmable architecture targeting efficient implementation of BNN. Computational memories based on the recently introduced Memristor Overwrite Logic (MOL) design style are employed. The architecture, which is presented in semi-parallel and parallel models, efficiently executes the advanced quantization algorithm of XNOR-Net BNN. Performance evaluation based on CIFAR-10 dataset demonstrates between 1.24× to 3× speedup, and 49% to 99% energy saving compared to state-of-the-art implementations, and up to 273 image/sec/Watt throughput efficiency.

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Section: B Bnn Layer In-memorymentioning

confidence: 99%

MOL-Based In-Memory Computing of Binary Neural Networks

Ali

Baghdadi

Dupraz

et al. 2022

IEEE Trans. VLSI Syst.

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show abstract

“…As a basic operation, ranking requires a more efficient software and hardware co‐design solution to realize it. [ 28,29 ] In‐memory rank [ 30,31 ] can take advantage of the binary conductance of the device, and realize the sorting operation through the in situ approach with the help of peripheral processing circuits, which greatly improves the sorting speed and reduces power consumption.…”

Section: Introductionmentioning

confidence: 99%

Neural Architecture Search with In‐Memory Multiply–Accumulate and In‐Memory Rank Based on Coating Layer Optimized C‐Doped Ge₂Sb₂Te₅ Phase Change Memory

Yan

et al. 2023

Adv Funct Materials

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Neural architecture search (NAS), as a subfield of automated machine learning, can design neural network models with better performance than manual design. However, the energy and time consumptions of conventional software‐based NAS are huge, hindering its development and applications. Herein, 4 Mb phase change memory (PCM) chips are first fabricated that enable two key in‐memory computing operations—in‐memory multiply‐accumulate (MAC) and in‐memory rank for efficient NAS. The impacts of the coating layer material are systematically analyzed for the blade‐type heating electrode on the device uniformity and in turn NAS performance. The random weights in the searched network architecture can be fine‐tuned in the last stage. With 512 × 512 arrays based on 40 nm CMOS process, the PCM‐based NAS has achieved 25–53× smaller model size and better performance than manually designed networks and improved the energy and time efficiency by 4779× and 123×, respectively, compared with NAS running on graphic processing unit (GPU). This work can expand the hardware accelerated in‐memory operators, and significantly extend the applications of in‐memory computing enabled by nonvolatile memory in advanced machine learning tasks.

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Accurate Low-Bit Length Floating-Point Arithmetic with Sorting Numbers

Dehghanpour,

Khodamoradi Kordestani,

Dehyadegari

2023

Neural Process Lett

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Memristive Data Ranking

Cited by 14 publications

References 61 publications

MOL-Based In-Memory Computing of Binary Neural Networks

MOL-Based In-Memory Computing of Binary Neural Networks

Neural Architecture Search with In‐Memory Multiply–Accumulate and In‐Memory Rank Based on Coating Layer Optimized C‐Doped Ge₂Sb₂Te₅ Phase Change Memory

Accurate Low-Bit Length Floating-Point Arithmetic with Sorting Numbers

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Memristive Data Ranking

Cited by 14 publications

References 61 publications

MOL-Based In-Memory Computing of Binary Neural Networks

MOL-Based In-Memory Computing of Binary Neural Networks

Neural Architecture Search with In‐Memory Multiply–Accumulate and In‐Memory Rank Based on Coating Layer Optimized C‐Doped Ge2Sb2Te5 Phase Change Memory

Accurate Low-Bit Length Floating-Point Arithmetic with Sorting Numbers

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Product

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Neural Architecture Search with In‐Memory Multiply–Accumulate and In‐Memory Rank Based on Coating Layer Optimized C‐Doped Ge₂Sb₂Te₅ Phase Change Memory