Memory Operation of Silicon Quantum-Dot Floating-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

Abstract

The drain current versus gate voltage characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs) with a silicon quantum-dot (QD) layer floating gate have shown the unique hysteresis and current bumps which arise from the electron charging or discharging of the QDs with an average dot height of 5 nm. The drain current response to application of a single-pulse gate bias has revealed that the multiple-step charging of the QD layer occurs until single electron occupation at each QD is achieved.

Control of electronic charged states of Si-based quantum dots for floating gate application

“…We have fabricated n-MOSFETs with a doubly-stacked Si-QDs floating gate [6,7], and confirmed the multi-step electron charging to the Si-QDs floating gate associated with Coulomb blockade effect from distinct bumps in drain current-gate voltage characteristics observed in ramping up the gate voltage after complete discharging at room temperature. We have also found that, in the temporal change in the drain current at a constant gate bias, Id-t, the electron injection to the Si-QDs floating gate proceeds in a stepwise fashion through metastable states with a fairly long incubation period to the next charging as seen in Fig.…”

“…So far, we have reported spontaneous formation of Si-QDs on thermally-grown SiO 2 with a fairly uniform size distribution and a high areal density (N10 11 cm − 2 ) by controlling the early stages of LPCVD from SiH 4 [5], and demonstrated unique multiple-step electron charging in the Si-QDs floating gate even at room temperature [6,7]. For precise control of the multi-valued memory operation, a clear insight into the charging and discharging characteristics of the Si-QDs is imperative.…”

“…In fabricating MOS capacitors and FETs with Si-QDs as a floating gate [6,7], a~7.5 nm-thick SiO 2 layer was formed conformally on the dot layer as follows: First, the surface of Si-QDs was oxidized at 850°C in dry O 2 to form a~1.0 nm-thick SiO 2 layer. After OH-termination of the oxidized 1000°C.…”

Floating nanodot gate memory fabrication with biomineralized nanodot as charge storage node

“…1,2 The use of floating gate composed of discrete nanodots reduces the problems of charge loss encountered in conventional plate-type flash memories, allowing further scaling of tunnel oxide and smaller operating voltages, better endurance, and fast write/erase speeds. 1,2 The discrete charge storage elements utilized in such devices are usually isolated silicon or germanium nanocrystals fabricated by chemical vapor deposition, [1][2][3][4] low energy ion implantation, 5,6 annealing of silicon rich oxide, 7 thermal oxidation of SiGe, 8 aerosol nanocrystal formation, 9 traps in nitride film, 10 or self-assembled metal nanoparticles. 11 The performance and the success of floating nanodot gate memories strongly depend on the structural characteristics of fabricated nanodots such as size, shape, and in-plane ordering and density of them in the MOS stacked structure.…”

Temporal Changes of Charge Distribution in High Density Self-aligned Si-based Quantum Dots as Evaluated by AFM/KFM

“…Discrete charged states of Si quantum dots (Si-QDs) originating from quantization and charging effects have motivated us to apply the Si-QDs to charge storage nodes for floating gate MOS memories [1][2][3][4][5]. Previously, we have reported the self-assembling formation of the Si-QDs from chemical vapor deposition (LPCVD) of pure SiH 4 [6] and demonstrated that, using an atomic force microscopy (AFM)/Kelvin force microscopy (KFM) technique [7][8][9], the amount of charges stored in each Si-QD can be evaluated from the surface potential change due to electron injection to and extraction from the Si-QDs [10].…”