Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC

Abstract

Emerging embedded systems require heterogeneous multiprocessor SoC architectures that can satisfy both high-performance and programmability. However, as the complexity of embedded systems increases, software programming on an increasing number of multiprocessors faces several critical problems, such as multithreaded code generation, heterogeneous architecture adaptation, short design time, and low cost implementation. In this paper, we present a software code generation flow based on Simulink to address these problems. We propose a functional modeling style to capture data-intensive and controldependent target applications, and a system architecture modeling style to seamlessly transform the functional model into the target architecture. Both models are described using Simulink. From a system architecture Simulink model, a code generator produces a multithreaded code, inserting thread and communication primitives to abstract the heterogeneity of the target architecture. In addition, the multithread code generator called LESCEA applies the extensions of dataflow based memory optimization techniques, considering both data and control dependency. Experimental results on a Motion-JPEG decoder and an H.264 decoder show that the proposed multithread code generator enables easy software programming on different multiprocessor architectures with substantially reduced data memory size (up to 68.0%) and code memory size (up to 15.9%).

ILP Based Multithreaded Code Generation for Simulink Model

“…The proposed techniques are implemented based on LESCEA multithreaded code generator of the Simulinkbased MPSoC design platform [1], [21], [22]. Multithreaded code generator takes a Simulink Model as an input and generates a set of software thread codes, and builds software stacks fit to corresponding scheduling results and the target hardware architecture.…”

“…LESCEA (Light and Efficient Simulink Compiler for Embedded Application) [1] is an automatic code generation tool based on Simulink models. Abstract Clock Synchronous Models (ACSM) is proposed as its functional model, where applications are represented with tasks and data links.…”

“…In order to avoid deadlock, global scheduling [1], [21], [22] is the most general strategy, where all blocks in the model are scheduled together, no matter whether they are in the same thread. Global scheduling concerns more between threads, so it may decrease the scheduling speed.…”

“…Recently, functional models have been used to express parallelism in target applications and can be easily transformed into multithreaded code automatically [1]. Some high-level modeling languages, such as Khan Process Network (KPN) [2], dataflow [3] and Simulink [4], have been used for system specification and system implementation with automatic hardware and software code generators [5]- [9].…”

Processor virtualization and split compilation for heterogeneous multicore embedded systems

“…We also consider the raising popularity of control languages like Simulink, and not only as modeling tools but also as code generators. There is an enormous potential for parallelizing and optimizing Simulink compilers in the embedded Table 1: Run times and speedup of split automatic vectorization system design area [25]. Processor virtualization may alleviate performance caveats of control languages, relying on whole-program optimization and partial evaluation [39,40].…”