Memory-Aware Dynamic Voltage and Frequency Prediction for Portable Devices

Liang, Wen-Yew; Chen, Shih-Chang; Chang, Yang-Lang; Fang, Jyh-Perng

doi:10.1109/rtcsa.2008.19

Cited by 23 publications

(25 citation statements)

References 15 publications

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“…An online learning method has been used to evaluate the frequency bound in the tasks [1] . Reference [2] and Reference [3] proposed some energy optimization algorithm based on memory-aware technology, and they have considered about the memory access overhead in the system. There is also a mechanism that has combined DVFS technology and DPM technology in [4], so the algorithm in this work can make a better energy optimization.…”

Section: Related Workmentioning

confidence: 99%

A Time Reservation Dynamic Algorithm Based on the Variable Frequency Interval DVFS Technology

Xiao¹,

Cheng²,

Zeng³

2014

Proceedings of the 3rd International Conference on Computer Science and Service System

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Abstract-embedded systems have been used in various areas of people's lives. However, the contradictions between performance and power consumption of embedded products have become increasingly prominent. DVFS technologies provide the possibility for solving the contradiction between performance and power consumption of equipment. In this paper, a DVFS algorithm based on variable interval DVFS technology has been improved. The improved algorithm reduces response delay by reserving part of execution time of the task.

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Section: Related Workmentioning

confidence: 99%

A Time Reservation Dynamic Algorithm Based on the Variable Frequency Interval DVFS Technology

Xiao¹,

Cheng²,

Zeng³

2014

Proceedings of the 3rd International Conference on Computer Science and Service System

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“…Xia et al (2008) proposes energy management based on a feedback control scheduling methodology. The processor DVS analysis has been extended by other authors to reduce energy consumption in the memory (Cho and Chang, 2006;Liang et al, 2008) and network levels (Yi et al, 2009;Kumar et al, 2008).…”

Section: Related Workmentioning

confidence: 99%

“…This approach exploits the convex, and normally quadratic relationship between CPU energy consumption and voltage. Additionally, these techniques have been extended to reduce the energy consumed during memory cycles (Cho and Chang, 2006;Liang et al, 2008) and network energy consumption (Yi et al, 2009;Kumar et al, 2008). …”

Section: Introductionmentioning

confidence: 99%

High performance dynamic voltage/frequency scaling algorithm for real-time dynamic load management

Coronel

Simó

2012

Journal of Systems and Software

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Modern cyber-physical systems assume a complex and dynamic interaction between the real world and the computing system in real-time. In this context, changes in the physical environment trigger changes in the computational load to execute. On the other hand, task migration services offered by networked control systems require also management of dynamic real-time computing load in nodes. In such systems it would be difficult, if not impossible, to analyse off-line all the possible combinations of processor loads. For this reason, it is worthwhile attempting to define new flexible architectures that enable computing systems to adapt to potential changes in the environment.We assume a system composed by three main components: the first one is responsible of the manage-ment of the requests arisen when new tasks require to be executed. This management component asks to the second component about the resources available to accept the new tasks. The second component performs a feasibility analysis to determine if the new tasks can be accepted coping with its real-time constraints. A new processor speed is also computed. A third component monitors the execution of tasks applying a fixed priority scheduling policy and additionally controlling the frequency of the processor. This paper focus on the second component providing a "correct" (a task never is accepted if it is not schedulable) and "near-exact" (a task is rarely rejected if it is schedulable) algorithm that can be appli-cable in practice because its low/medium and predictable computational cost. The algorithm analyses task admission in terms of processor frequency scaling. The paper presents the details of a novel algo-rithm to analyse tasks admission and processor frequency assignment. Additionally, we perform several simulations to evaluate the comparative performance of the proposed approach. This evaluation is made in terms of energy consumption, task rejection ratios, and real computing costs. The results of simula-tions show that from the cost, execution predictability, and task acceptance points of view, the proposed algorithm mostly outperforms other constant voltage scaling algorithms.

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“…Por otro lado, en (Marinoni & Buttazzo, 2007) se propone el uso de planificadores elásticos para mejorar la gestión DVS y en (Zhu et al, 2004), (Xia, 2008) la gestión de energía se basa en métodos de planificación por control realimentado (feedback control scheduling). El análisis de ahorro energético en procesadores con capacidades DVS ha sido extendido por otros autores para su uso en la reducción de consumo a nivel de memoria (Cho & Chang, 2006) (Liang et al, 2008) y a nivel de red de comunicaciones (Yi et al, 2009) (Kumar et al, 2008).…”

Section: Trabajos Relacionadosunclassified

“…Esta técnica aprovecha la relación convexa, y normalmente cuadrática, entre el consumo de energía del procesador y el voltaje de alimentación. Adicionalmente, estas técnicas han sido extendidas para disminuir la energía consumida por la memoria del sistema (Lee et al, 2012;Kim et al, 2011;Liang et al, 2008) y en el consumo de energía en redes de comunicaciones (Fateh & Govindarasu, 2015;Yi et al, 2009;Kumar et al, 2008).…”

Section: Introducción Y Motivaciónunclassified

Gestión de la carga dinámica de tareas de tiempo real con criterios de ahorro energético y su aplicación en el desarrollo de un middleware de control.

Parada¹,

Osvaldo²

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AgradecimientosAgradezco a todos los profesores y compañeros que de una u otra forma han colaborado en el desarrollo de esta tesis. Y en especial, a mi director José Simó cuya orientación, apoyo y susánimos han sido fundamentales para la realización de este trabajo.Igualmente agradezco a los miembros del Grupo de Informática Industrial del DISCA, con especial cariño a Alfons, Paco y Pascual, por su colaboración y acogimiento durante mi formación y desarrollo de esta investigación.A mis padres, Osvaldo e Idda, a Laura, Lucas y Noa por toda la paciencia, comprensión y motivación inyectada para la culminación de este proyecto. III AbstractThe development of embedded systems in industrial sectors such as railway, aerospace and automotive are based on Critical Real-Time Embedded Systems (CRTES). These systems face new challenges and demand related to increase of dependability, intelligence, connectivity, cost-size-volume reduction and energy efficiency. In this last topic is where this thesis expects to have a higher contribution.The global energy consumption can be combined with others criteria such as schedulability, communication delays and control application correctness, which contribute to determine the dynamic code movement and on-line load balancing in a system. The main goal of this thesis is the development of mechanisms for the management and optimization of energy consumption. These mechanisms are presented in the context of a distributed real-time control system and from the perspective of control kernel middleware. Let's consider a dynamic environment where an embedded and networked system operates with the support of task migration and processor frequency scaling. Assuming that the system knows where and when it must allocate tasks, we must perform feasibility analyses when each task arrives and departs on the affected embedded units. This guarantees that the temporal requirements of the system will be accomplished during the task allocation phase or delegation of tasks. Additionally, a new processor speed (frequency scaling) should be also computed to enable the system to adapt itself to the new computational workload and reduce energy consumption. And in this last is where the proposed algorithms in this work have their higher relevance. Although some authors have carried out these two phases (feasibility analysis and frequency scaling computation) separately, these analyses are strongly related and in some cases can be performed together.In this thesis, we present novel algorithm that perform feasibility analyses and compute new processor static frequencies based on dynamic voltage and frequency scaling techniques (DVFS). The frequency obtained as result of applying the algorithm proposed is the minimum processor frequency that minimizes CPU energy consumption while guaranteeing the fulfilment of real-time system constraints. The algorithm uses fixed priority scheduling schemes with deadlines less than, or equal to, the period of the tasks. Other propose of this algorithm is the use on-line during th...

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Memory-Aware Dynamic Voltage and Frequency Prediction for Portable Devices

Cited by 23 publications

References 15 publications

A Time Reservation Dynamic Algorithm Based on the Variable Frequency Interval DVFS Technology

A Time Reservation Dynamic Algorithm Based on the Variable Frequency Interval DVFS Technology

High performance dynamic voltage/frequency scaling algorithm for real-time dynamic load management

Gestión de la carga dinámica de tareas de tiempo real con criterios de ahorro energético y su aplicación en el desarrollo de un middleware de control.

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