Mechanism and Application of NMOS Leakage with Intra-Well Isolation Breakdown by Voltage Contrast Detection

Chen, Hunglin; Fan, Rongwei; Lou, Hsiaochi; Kuo, Mingsheng; Huang, Yixiao

doi:10.5573/jsts.2013.13.4.402

“…We refer a paper by Rosenkranz as a good survey on the topic [2]. Voltage-contrast images of DRAM and SRAM are found in the paper by Rosenkranz [2] and one by Chen et al [13], respectively.…”

Section: Pvc: Passive Voltage Contrastmentioning

confidence: 92%

Reversing Stealthy Dopant-Level Circuits

Sugawara

¹

,

Suzuki

²

,

Fujii

³

et al. 2014

Lecture Notes in Computer Science

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Abstract.A successful detection of the stealthy dopant-level circuit (trojan), proposed by Becker et al. at CHES 2013 [1], is reported. Contrary to an assumption made by Becker et al., dopant types in active region are visible with either scanning electron microscopy (SEM) or focused ion beam (FIB) imaging. The successful measurement is explained by an LSI failure analysis technique called the passive voltage contrast [2]. The experiments are conducted by measuring a dedicated chip. The chip uses the diffusion programmable device [3]: an anti-reverse-engineering technique by the same principle as the stealthy dopant-level trojan. The chip is delayered down to the contact layer, and images are taken with (1) an optical microscope, (2) SEM, and (3) FIB. As a result, the four possible dopant-well combinations, namely (i) p+/n-well, (ii) p+/p-well, (iii) n+/n-well and (iv) n+/p-well are distinguishable in the SEM images. Partial but sufficient detection is also achieved with FIB. Although the stealthy dopant-level circuits are visible, however, they potentially make a detection harder. That is because the contact layer should be measured. We show that imaging the contact layer is at most 16-times expensive than that of a metal layer in terms of the number of images 3 .

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“…The VC inspection also be used to verify NMOS leakage caused by broken intra-well isolation of the SRAM. [5]. Usual cases of those applications are mostly aimed at detecting physical defects or short open defect post CTW CMP at MEOL of the SRAM.…”

Section: Introductionmentioning

confidence: 99%

Methodology and Application of the Detection of Invisible Defect by Voltage Contrast Inspection

Fan

¹

,

Chen

²

,

Long

³

et al. 2014

ECS Trans.

0

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The study aimed at the detection of non-visual defects of poly gate CT leakage at dense logic area by voltage-contrast (VC) inspection. At the same time, some new steps after N-type plus (NP) source drain (S/D) implantation of front-end-of-the-line (FEOL) was proposed and compared to detect poly gate CT leakage at the dense logic area. The cause of t`he poly gate CT leakage was the extreme tiny poly footing which was too small to be detected by the optical system. The PG leakage was obviously impacted by poly etch process and the step height between active area (AA) and shallow trench isolation (STI). The poly gate CT leakage defects were solved by inline controlling to reduce the step height between AA and STI and optimizing poly etch process. Furthermore, the application extended the VC inspection from just middle-end-of-the-line to FEOL of semiconductor technology.

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Reversing stealthy dopant-level circuits

Sugawara

¹

,

Suzuki

²

,

Fujii

³

et al. 2015

View full text Add to dashboard Cite

Abstract.A successful detection of the stealthy dopant-level circuit (trojan), proposed by Becker et al. at CHES 2013 [1], is reported. Contrary to an assumption made by Becker et al., dopant types in active region are visible with either scanning electron microscopy (SEM) or focused ion beam (FIB) imaging. The successful measurement is explained by an LSI failure analysis technique called the passive voltage contrast [2]. The experiments are conducted by measuring a dedicated chip. The chip uses the diffusion programmable device [3]: an anti-reverse-engineering technique by the same principle as the stealthy dopant-level trojan. The chip is delayered down to the contact layer, and images are taken with (1) an optical microscope, (2) SEM, and (3) FIB. As a result, the four possible dopant-well combinations, namely (i) p+/n-well, (ii) p+/p-well, (iii) n+/n-well and (iv) n+/p-well are distinguishable in the SEM images. Partial but sufficient detection is also achieved with FIB. Although the stealthy dopant-level circuits are visible, however, they potentially make a detection harder. That is because the contact layer should be measured. We show that imaging the contact layer is at most 16-times expensive than that of a metal layer in terms of the number of images 3 .

show abstract

Mechanism and Application of NMOS Leakage with Intra-Well Isolation Breakdown by Voltage Contrast Detection

Cited by 10 publications

References 9 publications

Reversing Stealthy Dopant-Level Circuits

Reversing Stealthy Dopant-Level Circuits

Methodology and Application of the Detection of Invisible Defect by Voltage Contrast Inspection

Reversing stealthy dopant-level circuits

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