Mechanics of thin-film transistors and solar cells on flexible substrates

Abstract

When devices are fabricated on thin foil substrates, any mismatch strain in the device structure makes the work piece curve. Any change of the radius of curvature produces a change in the size of the work piece, and thereby misalignment between individual device layers. To achieve tight tolerances, changes of curvature must be minimized throughout the fabrication process. Amorphous silicon thin-film transistors and solar cells respond differently to externally applied tensile strain. The elastic deformation of the transistor is correlated with small increase in the electron mobility. When the tensile strain reaches ~ 0.34%, crack formation starts and causes an abrupt change in the transistor performance. The performance of solar cells, on the other hand, does not change for tensile strain up to ~ 0.7%. At larger strain the short-circuit current, open-circuit voltage, fill factor, and the efficiency gradually decrease

Structural origins of intrinsic stress in amorphous silicon thin films

“…Two trends in our data are consistent with conclusions of other studies that applied mechanical stress to a-Si films at room temperature: (1) failure under tension occurs at lower absolute stress levels than under compression, [38][39][40][41][42] and (2) the absolute magnitude of compressive stress possible without failure is on the order of 1 GPa. 39,40,42 …”

23.1: Invited Paper: Models and Experiments of Mechanical Integrity for Flexible Displays

“…Cracks initiated at 1.15% strain and 0.24% strain on steel and PI, respectively. The latter value is similar to data reported in literature [11]. Such a large difference in critical strain for the SiO 2 layer on the two types of substrates was analyzed starting from fracture mechanics concepts.…”

Mechanical failure analysis of thin film transistor devices on steel and polyimide substrates for flexible display applications

“…The COS was found to be equal to 0.24 ± 0.04%, a factor of 4.8 lower than that determined for the steel substrate case. Similar critical strain values (0.34%) have been reported for transistors on plastic substrates [7,16]. At 0.31% strain several cracks were found to have propagated in the SiO 2 layer, outside of the TFT stack first, and eventually within the stack around 0.7% strain.…”