Measuring the switching dynamics and energy efficiency of tantalum oxide memristors

Abstract

We measured the real-time switching of metal-oxide memristors with sub-nanosecond resolution and recorded the evolution of the current and voltage during both ON (set) and OFF (reset) events. From these we determined the dynamical behavior of the conductivity for different applied bias amplitudes. Quantitative analysis of the energy cost and switching dynamics showed 115 fJ for ON-switching and 13 pJ for OFF-switching when resistance change was limited to 200%. Results are presented that show a favorable scaling with speed in terms of energy cost and reducing unnecessary damage to the devices.

A family of memristor‐based reactance‐less oscillators

“…Figure 11 shows that the oscillation frequency increases linearly as the memristor constant increases. Very High oscillation frequencies can be achieved using recently introduced fast memristors [33][34][35]. However, slower memristors have their useful domain of applications as mentioned in Section 1.…”

“…However, the introduced concept is general and can be extended to higher frequencies given that technology advancement improves the response speed. For instance, memristors with fast sub-nanosecond switching time have recently been reported [33][34][35].…”

Toward large-scale access-transistor-free memristive crossbars

“…Ultra-high density memory arrays can be realized with memristive devices as their feature size can be shrunk to a sub-10nm scale, due to the elimination of the access-transistor and the simple structure of the memristors [8]. Moreover, both analysis and preliminary experimental measurements have also demonstrated its potential for lower power consumption than existing technologies [9,10,11]. The main contributors to its power efficiency are the access-transistor-free (ATF) memory structure and the passiveness of the devices.…”

Towards data reliable crossbar-based memristive memories

“…The fabrication process is CMOS-friendly [24], and efficient methods exist to stack layers of such memories [10] which facilitate the integration of 3D memristive memories with CMOS computing cores and decoding logic. Estimations as well as preliminary experimental measurements in their power consumption show considerable improvement over existing technologies [19,2], as maintaining the data stored in memory does not incur any power consumption, and there is no active leakage current (as they are two-terminal passive elements). Reported experimental data show very fast write operations [15], while the speed of a read operation is limited by that of its CMOS sensing circuitry.…”