Measurement problems in high-speed networks

Practical approach to power integrity‐driven design process for power‐delivery networks

“…At the resonance frequency of the impedance curve shown in Fig. 4, the minimum impedance value represented the ODR, which is the ESR of decoupling capacitors with cancelling reactance parameters [19][20][21]. Under bias conditions, the resistance was measured as 6.45 mΩ, which was the value for R 3 ∕∕R 4 ∕∕R 5 .…”

“…During the board evaluation phase, we fabricated boards corresponding to the four cases based on simulations involving [20][21][22][23]o ft h e active status. We captured the transient voltage droops of the evaluation boards for the time period in which the SoC utilised the maximum current, as shown in Fig.…”

“…We determined both the on‐die resistance (ODR) and on‐die capacitance (ODC) based on the amount of decoupling capacitance on the biasing status for combinations of R 3 , R 4 , R 5 , C 3 and C 4 . We added the variables R 4 and C 4 to the capacitors that were turned on under bias conditions, as defined in [19, 20]. We obtained R 5 from the leakage current through the MOSFET combination and silicon substrate and used the two‐port VNA measurement to accurately determine the ODR, which was on the order of milliohms.…”

“…During the board evaluation phase, we fabricated boards corresponding to the four cases based on simulations involving changes in the MLCC locations. Each case had plated through‐holes through four layers of the PCB, and a pair of power‐ground pads was on the bottom of the PCB for measurement [20–23] of the active status. We captured the transient voltage droops of the evaluation boards for the time period in which the SoC utilised the maximum current, as shown in Fig.…”