Measurement and modeling of Si integrated inductors

Arcioni, P.; Castello, R.; Astis, G. De; Sacchi, E.; Svelto, F.

doi:10.1109/19.746613

Cited by 38 publications

(7 citation statements)

References 6 publications

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“…All measurements were controlled by the HP software IC-CAP, and the measured S-parameters were corrected using the standard de-embedding technique to remove pad parasitics from the measured results. Pad de-embedding was performed by subtracting the Y-parameters of the 'open' pad pattern from those of the inductors [3]. where N m ( ¼ 101 ) is the number of frequency points used in the measurement, S pq (mea) and S pq (sim) (pq ¼ 11, 12, 21, and 22) are the measured and simulated S-parameters, respectively.…”

Section: Resultsmentioning

confidence: 99%

“…In the past few years, a large amount of experimental and theoretical work has been done to investigate the electromagnetic characteristics of single-spiral inductors of various geometries based on silicon or GaAs technology. Specifically, these works include the modelling, characterisation, and design of monolithic single-spiral inductors for radio frequency and monolithic microwave integrated circuits (RFICs and MMICs) [1][2][3][4]; improvement of the inductance and the quality factor of RF integrated inductors by geometry and layout optimisation [5,6]; and analysis of eddy current losses over conductive substrates with applications to monolithic single-spiral inductors or transformers [7][8][9]. Recently, for effective enhancement of the inductance, double-and multi-spiral stacked structures have been utilised [10].…”

Section: Introductionmentioning

confidence: 99%

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Modelling on-chip circular double-spiral stacked inductors for RFICs

Wang

Pan

et al. 2003

IEE Proc., Microw. Antennas Propag.

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Extensive experimental results and detailed investigations of the performance of on-chip circular double-spiral stacked inductors on silicon substrates are presented. Based on a proposed equivalent circuit model and measured S-parameters using the de-embedding technique, the inductance L, resonant frequency f res , Q-factor, coupling capacitance between the upper and lower spirals, and oxide capacitance of these inductors are extracted and compared with the single-spiral case. Some locally scalable formulas, including single-spiral geometries, are obtained to predict inductor performance. Methods to improve the L and Q-factor are explored for double-spiral stacked inductors with single via connection.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Modelling on-chip circular double-spiral stacked inductors for RFICs

Wang

Pan

et al. 2003

IEE Proc., Microw. Antennas Propag.

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“…The parasitic effects induced by signal pads and ground plane were subtracted from overall measurements with de-embedding procedure to ensure the accuracy of the final results. Y-parameter data were extracted from the measured S-parameter data using the method explained in Arcioni et al (1998) and inductors' major RF characteristics are calculated as following:…”

Section: Characterization and Discussionmentioning

confidence: 99%

High aspect ratio air core solenoid inductors using an improved UV-LIGA process with contrast enhancement material

Pillans

Lee

et al. 2006

Microsyst Technol

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In this paper, we investigate the application of a contrast enhancement material (CEM388SS Ò , ShinEtsu MicroSi, Inc., AZ, USA) on thick SU-8 negative photoresist (Microchem Corp., MA, USA) and its use in the construction of a high aspect ratio on-chip solenoid inductor. Various SU8 test microstructures (with aspect ratio of 10:1 and 20:1) were first constructed by utilizing this improved UV-LIGA process to demonstrate the clear difference before and after the application of CEM. It was found that this material dramatically reduced the ''T-topping'' effect and improved the structural profile angle; and higher aspect ratio microstructures could be achieved without modification/upgrades of any kind on the existing lithography tool. Furthermore, we implemented this process in the fabrication work of high aspect ratio air core solenoid inductor and obtained a very high quality (Q) factor of 72.8 at 9.7 GHz from a 3-turn inductors and a high inductance of 28 nH from a 20-turn inductor. Experimental data showed that inductors with taller via structures (higher aspect ratio) had better radio frequency (RF) characteristics than those of lower via structures, which are highly desirable in many communication applications.

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“…The outer diameter of the inductor coils and number of coil turns were varied in order to obtain the inductance values to closely match to the target inductance values while keeping enough inner diameter of the inductor coils to minimize the proximity effects due to eddy current produced from the magnetic field of the inductor coil. In order to eliminate parasitic effects from ground planes and signal pads from the device under the test (DUT) inductors, de-embedding of these parasitic was essential (Arcioni et al 1998). Two sets of high frequency simulations were carried out for all MEMS on-chip inductors (one for the DUT inductor with ground planes and signal pads and the other for no inductor with ground planes and signal pads) to obtain scattering parameters (S-parameters).…”

Section: Hfss Simulationmentioning

confidence: 99%

Chip-level integration of RF MEMS on-chip inductors using UV-LIGA technique

et al. 2008

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This paper presents a chip-level integration of radio-frequency (RF) microelectromechanical systems (MEMS) air-suspended circular spiral on-chip inductors onto MOSIS RF circuit chips of LNA and VCO using a multi-layer UV-LIGA technique including SU-8 UV lithography and copper electroplating. A high frequency simulation package, HFSS, was used to determine the layout of MEMS on-chip inductors with inductance values close to the target inductance values required for the RF circuit chips within the range of 10%. All MEMS on-chip inductors were successfully fabricated using a contrast enhancement method for 50 lm air suspension without any physical deformations. High frequency measurement and modeling of the integrated inductors revealed relatively high quality factors over 10 and self-resonant frequencies more than 15 GHz for a 1.44 nH source inductor and a 3.14 nH drain inductor on low resistivity silicon substrates (0.014 X cm). The post-IC integration of RF MEMS onchip inductors onto RF circuit chips at a chip scale using a multi-layer UV-LIGA technique along with high frequency measurement and modeling demonstrated in this work will open up new avenues with the wider integration feasibility of MEMS on-chip inductors in RF applications for costeffective prototype applications in small laboratories and businesses.

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Measurement and modeling of Si integrated inductors

Cited by 38 publications

References 6 publications

Modelling on-chip circular double-spiral stacked inductors for RFICs

Modelling on-chip circular double-spiral stacked inductors for RFICs

High aspect ratio air core solenoid inductors using an improved UV-LIGA process with contrast enhancement material

Chip-level integration of RF MEMS on-chip inductors using UV-LIGA technique

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