2002 32nd European Microwave Conference 2002
DOI: 10.1109/euma.2002.339253
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Measured Propagation Characteristics of Finite Ground Coplanar Waveguide on Silicon with a Thick Polyimide Interface Layer

Abstract: Measured propagation characteristicsof Finite Ground Coplanar (FGC) waveguide on silicon substrates with resistivities spanning 3 orders of magnitude (0.1 to 15.5 Ohm cm) and a 20 I.tm thick polyimide interface layer is presented as a function of the FGC geometry. Results show that there is an optimum FGC geometry for minimum loss, and silicon with a resistivity of 0.1 Ohm cm has greater loss than substrates with higher and lower resistivity. Lastly, substrates with a resistivity of 10 Ohm cm or greater have a… Show more

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Cited by 8 publications
(7 citation statements)
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“…To better illustrate the relationship between attenuation and the FGC line dimensions (S+2W), the data from Figure 4 is replotted in Figure 5. In Figure 5, it is seen that there is a minimum attenuation for S+2W=90, or (S+2W)/Hp=4 for aspect ratio normalized to polyimide thickness, which agrees with the design rule presented in [3] that was derived for FGC lines on Si wafers with a polyimide interface layer. Also plotted in Figure 5 is the attenuation of FGC lines on three Si wafers with different resistivities and a 20 µm polyimide interface layer [3].…”
Section: Resultssupporting
confidence: 83%
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“…To better illustrate the relationship between attenuation and the FGC line dimensions (S+2W), the data from Figure 4 is replotted in Figure 5. In Figure 5, it is seen that there is a minimum attenuation for S+2W=90, or (S+2W)/Hp=4 for aspect ratio normalized to polyimide thickness, which agrees with the design rule presented in [3] that was derived for FGC lines on Si wafers with a polyimide interface layer. Also plotted in Figure 5 is the attenuation of FGC lines on three Si wafers with different resistivities and a 20 µm polyimide interface layer [3].…”
Section: Resultssupporting
confidence: 83%
“…In Figure 5, it is seen that there is a minimum attenuation for S+2W=90, or (S+2W)/Hp=4 for aspect ratio normalized to polyimide thickness, which agrees with the design rule presented in [3] that was derived for FGC lines on Si wafers with a polyimide interface layer. Also plotted in Figure 5 is the attenuation of FGC lines on three Si wafers with different resistivities and a 20 µm polyimide interface layer [3]. The lines from [3] have approximately a 50 Ω characteristic impedance and were fabricated and characterized the same as the lines in this paper.…”
Section: Resultssupporting
confidence: 83%
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“…To use FGC lines on silicon wafers with resistivities used for CMOS circuits, a thin dielectric layer between the FGC line and silicon is required to minimize electromagnetic-field interaction with the Si substrate. This has enabled measured attenuation levels of around 3 dB/cm at 25 GHz to be reported [16]. Care should be exercised, however, when designing FGC lines on CMOS-type silicon substrates with dielectric overlays, as considerable loss can be attained [14], [16].…”
mentioning
confidence: 99%
“…This has enabled measured attenuation levels of around 3 dB/cm at 25 GHz to be reported [16]. Care should be exercised, however, when designing FGC lines on CMOS-type silicon substrates with dielectric overlays, as considerable loss can be attained [14], [16]. Coupling is very small between FGC lines on high-resistivity silicon (HRS) substrate (no dielectric overlay) [17].…”
mentioning
confidence: 99%