Max-log-MAP decoding with reduced memory complexity

Turbo encoder and decoder are two important blocks of long-term evolution (LTE) systems, as they address the data encoding and decoding in a communication system. In recent years, the wireless communication has advanced to suit the user needs. The power optimization can be achieved by proposing early termination of decoding iteration where the number of iterations is made adjustable which stops the decoding as it finishes the process. Clock gating technique is used at the RTL level to avoid the unnecessary clock given to sequential circuits; here clock supplies are a major source of power dissipation. The performance of a system is affected due to the numbers of parameters, including channel noise, type of decoding and encoding techniques, type of interleaver, number of iterations, and frame length on the Matlab Simulink platform. A software reference model for turbo encoder and decoder are modeled using MATLAB Simulink. Performance of the proposed model is estimated and analyzed on various parameters like frame length, number of iterations, and channel noise.

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Max-log-MAP decoding with reduced memory complexity

Cited by 2 publications

References 10 publications

Architectural Comparison Model for Area-Efficient PMAP Turbo-Decoders

Architectural Comparison Model for Area-Efficient PMAP Turbo-Decoders

Evalutation of Turbo Decoder Performance Through Software Reference Model

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