Mathematical analysis of buffer sizing for Network-on-Chips under multimedia traffic

Abstract

Designing appropriate buffer sizes for routers within Network-on-Chip (NoC) so as to minimize the power while preserving the required performance in the presence of self-similar traffic has been considered a challenging problem in the literature. A few analytical studies carried out in NoC modeling have been adopted assumptions such as exponentiallydistributed packet inter-arrivals, and conclusions reached under such assumptions may be inappropriate in the presence of self-similar traffic. Through mathematical analysis this paper predicts the optimal buffer size under self-similar traffic using Discrete Poisson Pareto Burst Process (DPPBP). The validity of the mathematical expressions is demonstrated through simulation experiments.

System-level buffer allocation for application specific network-on-chip with wormhole routing

“…However, wormhole routing is more suitable for NoC as it requires less implementation cost. Because of the differences between wormhole and storeand-forward/virtual-cut-through, the methods in [6] and [22] cannot be directly used to customize the buffer resources for wormhole NoC.…”

“…The authors of [6,22] propose buffer allocation methods for store-and-forward or virtual-cut-through [23] NoC, respectively. However, wormhole routing is more suitable for NoC as it requires less implementation cost.…”

A Review of Research on Traffic Modeling for NoC

“…[19][20] suggested that the specific application had a significant relationship with the Hurst parameter. [21] demonstrated that increasing channel service rate of NoC reduced self-similarity degree. Although the development procedure of the traffic modeling in NoC is similar to it in the computer networks, it is impractical to blindly reuse features of application-specific traffic models in computer networks.…”