2020 IEEE Symposium on VLSI Technology 2020
DOI: 10.1109/vlsitechnology18217.2020.9265043
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Materials Technology Co-Optimization of Self-Aligned Gate Contact for Advanced CMOS Technology Nodes

Ashish Pal
1
,
J. Ferrell
2
,
Angada B. Sachid
3
et al.
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