Matched public PUF: Ultra low energy security platform

Meguerdichian,; Potkonjak,

doi:10.1109/islped.2011.5993602

Cited by 25 publications

(12 citation statements)

References 27 publications

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“…It can also be used for a graduation of the PUF responses which is robust to PUF modeling attacks or for better statistical properties of the PUF by changing the PUF responses. Public PUFs (PPUFs) [39], [40], [41] leverage the aging to shape the PUF responses. The main purpose of applying aging to PPUFs is to make the responses of the PUFs, which are shared among the trusted parties, identical for low-power consumption and fast authentication.…”

Section: B Leveraging Aging To Pufs and Circuitsmentioning

confidence: 99%

Processor-Based Strong Physical Unclonable Functions With Aging-Based Response Tuning

Kong¹,

Koushanfar²

2014

IEEE Trans. Emerg. Topics Comput.

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A strong physically unclonable function (PUF) is a circuit structure that extracts an exponential number of unique chip signatures from a bounded number of circuit components. The strong PUF unique signatures can enable a variety of low-overhead security and intellectual property protection protocols applicable to several computing platforms. This paper proposes a novel lightweight (low overhead) strong PUF based on the timings of a classic processor architecture. A small amount of circuitry is added to the processor for on-the-fly extraction of the unique timing signatures. To achieve desirable strong PUF properties, we develop an algorithm that leverages intentional post-silicon aging to tune the inter-and intrachip signatures variation. Our evaluation results show that the new PUF meets the desirable inter-and intrachip strong PUF characteristics, whereas its overhead is much lower than the existing strong PUFs. For the processors implemented in 45 nm technology, the average inter-chip Hamming distance for 32-bit responses is increased by 16.1% after applying our post-silicon tuning method; the aging algorithm also decreases the average intra-chip Hamming distance by 98.1% (for 32-bit responses).INDEX TERMS Physically unclonable function, multi-core processor, secure computing platform, postsilicon tuning, circuit aging, negative bias temperature instability. 16 2168-6750

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Section: B Leveraging Aging To Pufs and Circuitsmentioning

confidence: 99%

Processor-Based Strong Physical Unclonable Functions With Aging-Based Response Tuning

Kong¹,

Koushanfar²

2014

IEEE Trans. Emerg. Topics Comput.

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“…This is achieved through the use of device aging and software disabling to reduce the computational requirement to only two clock cycles. The paradigm is that the delay of each transistor can be altered using device aging in such a way to create two identical PUFs after a subset of transistors is eliminated from the PUF using software techniques, such as special input selection [15], [16]. Much more research for implementing and evaluating this concept in current and pending technologies is still required.…”

Section: Security Paradigms For Puf Designmentioning

confidence: 99%

“…These implementations are intrinsically more resilient to attacks such as power and delay analysis attacks. They also enable a very low energy realization of public key protocols and can enable ultra fast protocols for many security protocols which are currently too slow to be practical [14], [15], [16]. There is also an ongoing effort to use PUFs to implement more complex security algorithms such as bit-commitment and oblivious transfer [19], [20].…”

Section: Public Key Cryptography and New Security Applicationsmentioning

confidence: 99%

Quo vadis, PUF?: Trends and challenges of emerging physical-disorder based security

Rostami¹,

Wendt²,

Potkonjak³

et al. 2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

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The physical unclonable function (PUF) has emerged as a popular and widely studied security primitive based on the randomness of the underlying physical medium. To date, most of the research emphasis has been placed on finding new ways to measure randomness, hardware realization and analysis of a few initially proposed structures, and conventional secretkey based protocols. In this work, we present our subjective analysis of the emerging and future trends in this area that aim to change the scope, widen the application domain, and make a lasting impact. We emphasize on the development of new PUF-based primitives and paradigms, robust protocols, publickey protocols, digital PUFs, new technologies, implementations, metrics and tests for evaluation/validation, as well as relevant attacks and countermeasures.

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“…GLC has enabled a variety of hardware-based security applications, such as hardware metering [6] [7], hardware trojan detection [8] and the creation of physically unclonable functions (PUFs) [9] [10]. The critical importance of GLC resulted in creation of a great variety of conceptually, statistically, and algorithmically different techniques, including: (i) direct measurements methods [11], (ii) field-programmable gate array (FPGA) reconfiguration-based approaches [12][13], (iii) schemes that embed and observe dedicated IC structures and specialized circuity [14], and (iv) non-destructive universal techniques that employ global measurements and calculate scaling factors of each gate by solving a system of equations [15] [16][17] [18].…”

Section: A Gate-level Characterization (Glc)mentioning

confidence: 99%

Gate Characterization Using Singular Value Decomposition: Foundations and Applications

Wei

Nahapetian

Nelson

et al. 2012

IEEE Trans.Inform.Forensic Secur.

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Abstract-Modern hardware security has a very broad scope ranging from digital rights management to the detection of ghost circuitry. These and many other security tasks are greatly hindered by process variation, which makes each integrated circuit (IC) unique, and device aging, which evolves the IC throughout its lifetime. We have developed a singular value decomposition (SVD)-based procedure for gate-level characterization (GLC) that calculates changes in properties, such as delay and switching power of each gate of an IC, accounting for process variation and device aging.We employ our SVD-based GLC approach for the development of two security applications: hardware metering and ghost circuitry (GC) detection. We present the first robust and low-cost hardware metering scheme, using an overlapping IC partitioning approach that enables rapid and scalable treatment. We also map the GC detection problem into an equivalent task of GLC consistency checking using the same overlapping partitioning. The effectiveness of the approaches is evaluated using the ISCAS85, ISCAS89, and ITC99 benchmarks. In hardware metering, we are able to obtain probabilities of coincidence in the magnitude of 10 −8 or less, and we obtain zero false positives and zero false negatives in GC detection.

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Matched public PUF: Ultra low energy security platform

Cited by 25 publications

References 27 publications

Processor-Based Strong Physical Unclonable Functions With Aging-Based Response Tuning

Processor-Based Strong Physical Unclonable Functions With Aging-Based Response Tuning

Quo vadis, PUF?: Trends and challenges of emerging physical-disorder based security

Gate Characterization Using Singular Value Decomposition: Foundations and Applications

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