Massively parallel breadth first search using a tree-structured memory model

John, Tom St.; Dennis, Jack B.; Gao, Guang R.

doi:10.1145/2141702.2141715

Cited by 5 publications

(2 citation statements)

References 11 publications

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“…The algorithm maintains two workspaces, one for the current and one for the next level. As St. John et al 15 described, the parallel implementation of Leiserson and Schardl 11 is not free of problems. Considering executions in a shared memory system, the implementation processes, in parallel, vertices that belong to a set.…”

Section: Related Workmentioning

confidence: 99%

An OpenMP‐based breadth‐first search implementation using the bag data structure

Gonzaga de Oliveira,

Santana,

Brandão

et al. 2024

Concurrency and Computation

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SummaryThe breadth‐first search procedure is an algorithm that traverses the vertices of a graph, determining the distance from each vertex to the initial vertex. The distance is infinite for a non‐reachable vertex from the starting vertex. Despite having an efficient serial version, this important algorithm is irregular, making its effective parallel implementation a daunting task. This paper shows the results of an OpenMP‐based implementation of the breadth‐first search procedure using the bag data structure. Furthermore, the code relied on the C++ programming language. This paper reimplements an existing proposal coded using the Cilk++ programming language. The experiments relied on 32 strongly connected graphs and 31 disconnected graphs in executions performed on two machines. The first machine contained 28 cores and two threads per core. The second machine comprised 48 processing cores, with hyperthreading disabled. Regarding the serial version, the parallel implementation yielded a speedup of up to 20× when using 28 processing cores and up to 25× when using 56 threads in tests performed on a machine with the first generation of Intel® Xeon® Scalable processors. Furthermore, the new parallel implementation yielded speedups of up to 45× when using 48 cores in experiments performed on a machine with the second generation of Intel® Xeon® Scalable processors.

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Section: Related Workmentioning

confidence: 99%

An OpenMP‐based breadth‐first search implementation using the bag data structure

Gonzaga de Oliveira,

Santana,

Brandão

et al. 2024

Concurrency and Computation

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show abstract

“…This approach originated in associative processors [6] and active data structures [1]; other examples include priority queues [2], systems with chunks of memory organised as trees [15], smart memories for multicore processors [5], associative searching [9]. Circuit parallelism is the target platform for compilation of a declarative committed-choice rule language [16].…”

Section: Introductionmentioning

confidence: 99%

Extensible sparse functional arrays with circuit parallelism

O'Donnell

2013

Proceedings of the 15th Symposium on Principles and Practice of Declarative Programming

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A longstanding open question in algorithms and data structures is the time and space complexity of pure functional arrays. Imperative arrays provide update and lookup operations that require constant time in the RAM theoretical model, but it is conjectured that there does not exist a RAM algorithm that achieves the same complexity for functional arrays, unless restrictions are placed on the operations. The main result of this paper is an algorithm that does achieve optimal unit time and space complexity for update and lookup on functional arrays. This algorithm does not run on a RAM, but instead it exploits the massive parallelism inherent in digital circuits. The algorithm also provides unit time operations that support storage management, as well as sparse and extensible arrays. The main idea behind the algorithm is to replace a RAM memory by a tree circuit that is more powerful than the RAM yet has the same asymptotic complexity in time (gate delays) and size (number of components). The algorithm uses an array representation that allows elements to be shared between many arrays with only a small constant factor penalty in space and time. This system exemplifies circuit parallelism, which exploits very large numbers of transistors per chip in order to speed up key algorithms. Extensible Sparse Functional Arrays (ESFA) can be used with both functional and imperative programming languages. The system comprises a set of algorithms and a circuit specification, and it has been implemented on a GPGPU with good performance.

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Compiling Fresh Breeze Codelets

Dennis¹

2014

Proceedings of Programming Models and Applications on Multicores and Manycores

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Massively parallel breadth first search using a tree-structured memory model

Cited by 5 publications

References 11 publications

An OpenMP‐based breadth‐first search implementation using the bag data structure

An OpenMP‐based breadth‐first search implementation using the bag data structure

Extensible sparse functional arrays with circuit parallelism

Compiling Fresh Breeze Codelets

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